diff options
| author | Dennis Kobert <dennis@kobert.dev> | 2025-03-08 21:06:20 +0100 |
|---|---|---|
| committer | Dennis Kobert <dennis@kobert.dev> | 2025-03-08 21:07:27 +0100 |
| commit | b4eae244826a0fb8907ef50c8ef9a38da40b719d (patch) | |
| tree | b57014575b3dfc38c5f25115357253d037b3189c /perf-event/examples | |
| parent | 06dd6966ad27f0c52c56092dd2f45a06541e5c6c (diff) | |
Vendor perf event
Diffstat (limited to 'perf-event/examples')
| -rw-r--r-- | perf-event/examples/big-group.rs | 95 | ||||
| -rw-r--r-- | perf-event/examples/group.rs | 58 | ||||
| -rw-r--r-- | perf-event/examples/insns-for-pid.rs | 27 | ||||
| -rw-r--r-- | perf-event/examples/println-cpi.rs | 30 | ||||
| -rw-r--r-- | perf-event/examples/println.rs | 15 |
5 files changed, 225 insertions, 0 deletions
diff --git a/perf-event/examples/big-group.rs b/perf-event/examples/big-group.rs new file mode 100644 index 0000000..71551b7 --- /dev/null +++ b/perf-event/examples/big-group.rs @@ -0,0 +1,95 @@ +use perf_event::events::{Cache, CacheOp, CacheResult, Hardware, WhichCache}; +use perf_event::{Builder, Group}; + +fn main() -> std::io::Result<()> { + const ACCESS: Cache = Cache { + which: WhichCache::L1D, + operation: CacheOp::READ, + result: CacheResult::ACCESS, + }; + const MISS: Cache = Cache { + result: CacheResult::MISS, + ..ACCESS + }; + + let mut group = Group::new()?; + let access_counter = Builder::new().group(&mut group).kind(ACCESS).build()?; + let miss_counter = Builder::new().group(&mut group).kind(MISS).build()?; + let branches = Builder::new() + .group(&mut group) + .kind(Hardware::BRANCH_INSTRUCTIONS) + .build()?; + let missed_branches = Builder::new() + .group(&mut group) + .kind(Hardware::BRANCH_MISSES) + .build()?; + let insns = Builder::new() + .group(&mut group) + .kind(Hardware::INSTRUCTIONS) + .build()?; + let cycles = Builder::new() + .group(&mut group) + .kind(Hardware::CPU_CYCLES) + .build()?; + + // Note that if you add more counters than you actually have hardware for, + // the kernel will time-slice them, which means you may get no coverage for + // short measurements. See the documentation. + // + // On my machine, this program won't collect any data unless I disable the + // NMI watchdog, as described in the documentation for `Group`. My machine + // has four counters, and this program tries to use all of them, but the NMI + // watchdog uses one up. + + let mut vec = (0..=100000).collect::<Vec<_>>(); + + group.enable()?; + vec.sort(); + println!("{:?}", &vec[0..10]); + group.disable()?; + + let counts = group.read()?; + + println!( + "enabled for {}ns, actually running for {}ns", + counts.time_enabled(), + counts.time_running() + ); + + if counts.time_running() == 0 { + println!("Group was never running; no results available."); + return Ok(()); + } + + if counts.time_running() < counts.time_enabled() { + println!("Counts cover only a portion of the execution."); + } + + println!( + "L1D cache misses/references: {} / {} ({:.0}%)", + counts[&miss_counter], + counts[&access_counter], + (counts[&miss_counter] as f64 / counts[&access_counter] as f64) * 100.0 + ); + + println!( + "branch prediction misses/total: {} / {} ({:.0}%)", + counts[&missed_branches], + counts[&branches], + (counts[&missed_branches] as f64 / counts[&branches] as f64) * 100.0 + ); + + println!( + "{} instructions, {} cycles ({:.2} cpi)", + counts[&insns], + counts[&cycles], + counts[&cycles] as f64 / counts[&insns] as f64 + ); + + // You can iterate over a `Counts` value: + for (id, value) in &counts { + println!("Counter id {} has value {}", id, value); + } + + Ok(()) +} diff --git a/perf-event/examples/group.rs b/perf-event/examples/group.rs new file mode 100644 index 0000000..1aa2629 --- /dev/null +++ b/perf-event/examples/group.rs @@ -0,0 +1,58 @@ +use perf_event::events::{Cache, CacheOp, CacheResult, Hardware, WhichCache}; +use perf_event::{Builder, Group}; + +fn main() -> std::io::Result<()> { + const ACCESS: Cache = Cache { + which: WhichCache::L1D, + operation: CacheOp::READ, + result: CacheResult::ACCESS, + }; + const MISS: Cache = Cache { + result: CacheResult::MISS, + ..ACCESS + }; + + let mut group = Group::new()?; + let access_counter = Builder::new().group(&mut group).kind(ACCESS).build()?; + let miss_counter = Builder::new().group(&mut group).kind(MISS).build()?; + let branches = Builder::new() + .group(&mut group) + .kind(Hardware::BRANCH_INSTRUCTIONS) + .build()?; + let missed_branches = Builder::new() + .group(&mut group) + .kind(Hardware::BRANCH_MISSES) + .build()?; + + // Note that if you add more counters than you actually have hardware for, + // the kernel will time-slice them, which means you may get no coverage for + // short measurements. See the documentation. + + let vec = (0..=51).collect::<Vec<_>>(); + + group.enable()?; + println!("{:?}", vec); + group.disable()?; + + let counts = group.read()?; + println!( + "L1D cache misses/references: {} / {} ({:.0}%)", + counts[&miss_counter], + counts[&access_counter], + (counts[&miss_counter] as f64 / counts[&access_counter] as f64) * 100.0 + ); + + println!( + "branch prediction misses/total: {} / {} ({:.0}%)", + counts[&missed_branches], + counts[&branches], + (counts[&missed_branches] as f64 / counts[&branches] as f64) * 100.0 + ); + + // You can iterate over a `Counts` value: + for (id, value) in &counts { + println!("Counter id {} has value {}", id, value); + } + + Ok(()) +} diff --git a/perf-event/examples/insns-for-pid.rs b/perf-event/examples/insns-for-pid.rs new file mode 100644 index 0000000..3fc73ae --- /dev/null +++ b/perf-event/examples/insns-for-pid.rs @@ -0,0 +1,27 @@ +use libc::pid_t; +use perf_event::events::Hardware; +use perf_event::Builder; +use std::thread::sleep; +use std::time::Duration; + +fn main() -> std::io::Result<()> { + let pid: pid_t = std::env::args() + .nth(1) + .expect("Usage: insns-for-pid PID") + .parse() + .expect("Usage: insns-for-pid PID"); + + let mut insns = Builder::new() + .observe_pid(pid) + .kind(Hardware::BRANCH_INSTRUCTIONS) + .build()?; + + // Count instructions in PID for five seconds. + insns.enable()?; + sleep(Duration::from_secs(5)); + insns.disable()?; + + println!("instructions in last five seconds: {}", insns.read()?); + + Ok(()) +} diff --git a/perf-event/examples/println-cpi.rs b/perf-event/examples/println-cpi.rs new file mode 100644 index 0000000..6524c37 --- /dev/null +++ b/perf-event/examples/println-cpi.rs @@ -0,0 +1,30 @@ +fn main() -> std::io::Result<()> { + use perf_event::events::Hardware; + use perf_event::{Builder, Group}; + + let mut group = Group::new()?; + let cycles = Builder::new() + .group(&mut group) + .kind(Hardware::CPU_CYCLES) + .build()?; + let insns = Builder::new() + .group(&mut group) + .kind(Hardware::INSTRUCTIONS) + .build()?; + + let vec = (0..=51).collect::<Vec<_>>(); + + group.enable()?; + println!("{:?}", vec); + group.disable()?; + + let counts = group.read()?; + println!( + "cycles / instructions: {} / {} ({:.2} cpi)", + counts[&cycles], + counts[&insns], + (counts[&cycles] as f64 / counts[&insns] as f64) + ); + + Ok(()) +} diff --git a/perf-event/examples/println.rs b/perf-event/examples/println.rs new file mode 100644 index 0000000..8760e3d --- /dev/null +++ b/perf-event/examples/println.rs @@ -0,0 +1,15 @@ +use perf_event::Builder; + +fn main() -> std::io::Result<()> { + let mut counter = Builder::new().build()?; + + let vec = (0..=51).collect::<Vec<_>>(); + + counter.enable()?; + println!("{:?}", vec); + counter.disable()?; + + println!("{} instructions retired", counter.read()?); + + Ok(()) +} |
