pm24.git/Documentation/devicetree/bindings/dma, branch master

Merge tag 'dmaengine-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

2024-11-27T21:25:47Z

Pull dmaengine updates from Vinod Koul: "New hardware support: - Qualcomm SAR2130P GPI dma support - Sifive PIC64GX pdma support - Rcar r7s72100 support and associated updates Updates: - STM32 DMA3 updates for packing/unpacking mode and prevention of additional xfers - Simplification of devm_acpi_dma_controller_register() and associate cleanup including headers - loongson prefix renames - Switch back to platform_driver::remove() subsystem update" * tag 'dmaengine-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: dmaengine: loongson2-apb: Rename the prefix ls2x to loongson2 dt-bindings: dma: sifive pdma: Add PIC64GX to compatibles dmaengine: fix typo in the comment dmaengine: stm32-dma3: clamp AXI burst using match data dmaengine: stm32-dma3: prevent LL refactoring thanks to DT configuration dt-bindings: dma: stm32-dma3: prevent additional transfers dmaengine: stm32-dma3: refactor HW linked-list to optimize memory accesses dmaengine: stm32-dma3: prevent pack/unpack thanks to DT configuration dt-bindings: dma: stm32-dma3: prevent packing/unpacking mode dmaengine: idxd: Move DSA/IAA device IDs to IDXD driver dt-bindings: dma: qcom,gpi: Add SAR2130P compatible dmaengine: Switch back to struct platform_driver::remove() dmaengine: ep93xx: Fix unsigned compared against 0 dmaengine: acpi: Clean up headers dmaengine: acpi: Simplify devm_acpi_dma_controller_register() dmaengine: acpi: Drop unused devm_acpi_dma_controller_free() dmaengine: sh: rz-dmac: add r7s72100 support dt-bindings: dma: rz-dmac: Document RZ/A1H SoC

dt-bindings: dma: sifive pdma: Add PIC64GX to compatibles

2024-10-21T17:41:11Z

PIC64GX is compatible as out of order DMA capable, just like the MPFS version, therefore we add it with microchip,mpfs-pdma as a fallback Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240930095449.1813195-10-pierre-henry.moussay@microchip.com Signed-off-by: Vinod Koul

dt-bindings: dma: stm32-dma3: prevent additional transfers

2024-10-21T17:21:45Z

Some devices require a single transfer. For example, reading FMC ECC status registers does not support multiple transfers. Add the possibility to prevent additional transfers, by setting bit 17 of the 'DMA transfer requirements' bit mask. Signed-off-by: Amelie Delaunay Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20241016-dma3-mp25-updates-v3-4-8311fe6f228d@foss.st.com Signed-off-by: Vinod Koul

dt-bindings: dma: stm32-dma3: prevent packing/unpacking mode

2024-10-21T17:21:44Z

When source data width/burst and destination data width/burst are different, data are packed or unpacked in DMA3 channel FIFO. Data are pushed out from DMA3 channel FIFO when the destination burst length (= data width * burst) is reached. If the channel is stopped before the transfer end, and if some bytes are packed/unpacked in the DMA3 channel FIFO, these bytes are lost. Indeed, DMA3 channel FIFO has no flush capability, only reset. To avoid potential bytes lost, pack/unpack must be prevented by setting memory data width/burst equal to peripheral data width/burst. Memory accesses will be penalized. But it is the only way to avoid bytes lost. Some devices (e.g. cyclic RX like UART) need this, so add the possibility to prevent pack/unpack feature, by setting bit 16 of the 'DMA transfer requirements' bit mask. Acked-by: Rob Herring (Arm) Signed-off-by: Amelie Delaunay Link: https://lore.kernel.org/r/20241016-dma3-mp25-updates-v3-1-8311fe6f228d@foss.st.com Signed-off-by: Vinod Koul

dt-bindings: dma: qcom,gpi: Add SAR2130P compatible

2024-10-21T17:02:16Z

Document compatible for GPI DMA controller on SAR2130P platform. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20241017-sar2130p-dma-v1-1-e6aa6789f116@linaro.org Signed-off-by: Vinod Koul

dt-bindings: dma: rz-dmac: Document RZ/A1H SoC

2024-10-14T17:41:33Z

Document the Renesas RZ/A1H DMAC block. This one does not have clocks, resets and power domains. Update the bindings accordingly. Introduce a generic name in the header to make future additions easier. Signed-off-by: Wolfram Sang Acked-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20241007110200.43166-7-wsa+renesas@sang-engineering.com Signed-off-by: Vinod Koul

dt-bindings: Fix array property constraints

2024-10-02T02:17:00Z

Schemas for array properties should only have 1 level of array constraints (e.g. items, maxItems, minItems). Sometimes the old encoding of all properties into a matrix leaked into the schema, and didn't matter for validation. Now the inner constraints are just silently ignored as json-schema array keywords are ignored on scalar values. Generally, keep the inner constraints and drop the outer "items". With gicv3 "mbi-alias" property, it is more appropriately a uint32 or uint64 as it is an address and size depends on "#address-cells". Reviewed-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240925232409.2208515-1-robh@kernel.org Signed-off-by: Rob Herring (Arm)

Merge tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2024-09-26T19:00:25Z

Pull SoC update from Arnd Bergmann: "Convert ep93xx to devicetree This concludes a long journey towards replacing the old board files with devictree description on the Cirrus Logic EP93xx platform. Nikita Shubin has been working on this for a long time, for details see the last post on https://lore.kernel.org/lkml/20240909-ep93xx-v12-0-e86ab2423d4b@maquefel.me/" * tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) dt-bindings: gpio: ep9301: Add missing "#interrupt-cells" to examples MAINTAINERS: Update EP93XX ARM ARCHITECTURE maintainer soc: ep93xx: drop reference to removed EP93XX_SOC_COMMON config net: cirrus: use u8 for addr to calm down sparse dmaengine: cirrus: use snprintf() to calm down gcc 13.3.0 dmaengine: ep93xx: Fix a NULL vs IS_ERR() check in probe() pinctrl: ep93xx: Fix raster pins typo spi: ep93xx: update kerneldoc comments for ep93xx_spi clk: ep93xx: Fix off by one in ep93xx_div_recalc_rate() clk: ep93xx: add module license dmaengine: cirrus: remove platform code ASoC: cirrus: edb93xx: Delete driver ARM: ep93xx: soc: drop defines ARM: ep93xx: delete all boardfiles ata: pata_ep93xx: remove legacy pinctrl use pwm: ep93xx: drop legacy pinctrl ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms ARM: dts: ep93xx: Add EDB9302 DT ARM: dts: ep93xx: add ts7250 board ARM: dts: add Cirrus EP93XX SoC .dtsi ...

Merge tag 'dmaengine-6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

2024-09-23T21:08:08Z

Pull dmaengine updates from Vinod Koul: "Unusually, more new driver and device support than updates. Couple of new device support, AMD, Rcar, Intel and New drivers in Freescale, Loonsoon, AMD and LPC32XX with DT conversion and mode updates etc. New support: - Support for AMD Versal Gen 2 DMA IP - Rcar RZ/G3S SoC dma controller - Support for Intel Diamond Rapids and Granite Rapids-D dma controllers - Support for Freescale ls1021a-qdma controller - New driver for Loongson-1 APB DMA - New driver for AMD QDMA - Pl08x in LPC32XX router dma driver Updates: - Support for dpdma cyclic dma mode - XML conversion for marvell xor dma bindings - Dma clocks documentation for imx dma" * tag 'dmaengine-6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (24 commits) dmaengine: loongson1-apb-dma: Fix the build warning caused by the size of pdev_irqname dmaengine: Fix spelling mistakes dmaengine: Add dma router for pl08x in LPC32XX SoC dmaengine: fsl-edma: add edma src ID check at request channel dmaengine: fsl-edma: change to guard(mutex) within fsl_edma3_xlate() dmaengine: avoid non-constant format string dmaengine: imx-dma: Remove i.MX21 support dt-bindings: dma: fsl,imx-dma: Document the DMA clocks dmaengine: Loongson1: Add Loongson-1 APB DMA driver dt-bindings: dma: Add Loongson-1 APB DMA dmaengine: zynqmp_dma: Add support for AMD Versal Gen 2 DMA IP dt-bindings: dmaengine: zynqmp_dma: Add a new compatible string dmaengine: idxd: Add new DSA and IAA device IDs for Diamond Rapids platform dmaengine: idxd: Add a new DSA device ID for Granite Rapids-D platform dmaengine: ti: k3-udma: Remove unused declarations dmaengine: amd: qdma: Add AMD QDMA driver dmaengine: xilinx: dpdma: Add support for cyclic dma mode dma: ipu: Remove include/linux/dma/ipu-dma.h dt-bindings: dma: fsl-mxs-dma: Add compatible string "fsl,imx8qxp-dma-apbh" dt-bindings: fsl-qdma: allow compatible string fallback to fsl,ls1021a-qdma ...

dt-bindings: dma: Add lpc32xx DMA mux binding

2024-09-13T19:01:34Z

LPC32XX SoCs use pl080 dma controller which have few request signals multiplexed between peripherals. This binding describes how devices can use the multiplexed request signals. Signed-off-by: Piotr Wojtaszczyk Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240627150046.258795-3-piotr.wojtaszczyk@timesys.com Signed-off-by: Rob Herring (Arm)