pm24.git/arch/csky/include/asm/pgalloc.h, branch v5.1Unnamed repository; edit this file 'description' to name the repository.
https://git.kobert.dev/pm24.git/atom?h=v5.12019-01-08T16:18:33Zcsky: fixup compile error with pte_alloc2019-01-08T16:18:33ZGuo Renren_guo@c-sky.com2019-01-08T12:31:43Zurn:sha1:2a60aa14a9a0333b3eef58150bc1ef654f7321ef
Commit: 4cf58924951e remove the address argument of pte_alloc without
modify csky related code. linux-5.0-rc1 compile failed with csky.
Remove the unnecessary address testing in pte_alloc().
Signed-off-by: Guo Ren <ren_guo@c-sky.com>
Cc: Joel Fernandes (Google) <joel@joelfernandes.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
csky: MMU and page table management2018-10-25T15:36:19ZGuo Renren_guo@c-sky.com2018-09-05T06:25:12Zurn:sha1:013de2d6671d89de3397904749c86a69ac0686f7
This patch adds files related to memory management and here is our
memory-layout:
Fixmap : 0xffc02000 – 0xfffff000 (4 MB - 12KB)
Pkmap : 0xff800000 – 0xffc00000 (4 MB)
Vmalloc : 0xf0200000 – 0xff000000 (238 MB)
Lowmem : 0x80000000 – 0xc0000000 (1GB)
abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem.
abiv2 CPUs are all PIPT cache and they could support highmem.
Lowmem is directly mapped by msa0 & msa1 reg, and we needn't setup
memory page table for it.
Link:https://lore.kernel.org/lkml/20180518215548.GH17671@n2100.armlinux.org.uk/
Signed-off-by: Guo Ren <ren_guo@c-sky.com>
Cc: Christoph Hellwig <hch@infradead.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>