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<title>pm24.git/arch/csky/include, branch v5.6</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<id>https://git.kobert.dev/pm24.git/atom?h=v5.6</id>
<link rel='self' href='https://git.kobert.dev/pm24.git/atom?h=v5.6'/>
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<updated>2020-02-21T07:43:25Z</updated>
<entry>
<title>csky: Add PCI support</title>
<updated>2020-02-21T07:43:25Z</updated>
<author>
<name>MaJun</name>
<email>majun258@linux.alibaba.com</email>
</author>
<published>2020-01-27T02:56:21Z</published>
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<id>urn:sha1:5b49c82dadfe0f3741778f57385f964ec1514863</id>
<content type='text'>
Add the pci related code for csky arch to support basic pci virtual
function, such as qemu virt-pci-9pfs.

Signed-off-by: MaJun &lt;majun258@linux.alibaba.com&gt;
Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
</content>
</entry>
<entry>
<title>csky: Fixup compile warning for three unimplemented syscalls</title>
<updated>2020-02-21T07:43:25Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2020-02-02T06:11:11Z</published>
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<id>urn:sha1:2305f60b76110cb3e8658a4ae85d1f7eb0c66a5b</id>
<content type='text'>
Implement fstat64, fstatat64, clone3 syscalls to fixup
checksyscalls.sh compile warnings.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
</content>
</entry>
<entry>
<title>csky: Add flush_icache_mm to defer flush icache all</title>
<updated>2020-02-21T07:43:24Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2020-01-31T12:33:10Z</published>
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<id>urn:sha1:997153b9a75c08d545ad45e6f8ceb432435d2425</id>
<content type='text'>
Some CPUs don't support icache.va instruction to maintain the whole
smp cores' icache. Using icache.all + IPI casue a lot on performace
and using defer mechanism could reduce the number of calling icache
_flush_all functions.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
</content>
</entry>
<entry>
<title>csky: Support icache flush without specific instructions</title>
<updated>2020-02-21T07:43:24Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2020-01-22T03:15:14Z</published>
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<id>urn:sha1:761b4f694cb90b63ca2739ac8a8a176342636e5e</id>
<content type='text'>
Some CPUs don't support icache specific instructions to flush icache
lines in broadcast way. We use cpu control registers to flush local
icache and use IPI to notify other cores.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
</content>
</entry>
<entry>
<title>csky: Separate fixaddr_init from highmem</title>
<updated>2020-02-21T07:43:24Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2019-12-01T14:34:19Z</published>
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<id>urn:sha1:f136008f31e91060d6b6e6e031cb2c827448e280</id>
<content type='text'>
After fixaddr_init is separated from highmem, we could use tcm
without highmem selected. (610 (abiv1) don't support highmem,
but it could use tcm now.)

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
</content>
</entry>
<entry>
<title>csky: Tightly-Coupled Memory or Sram support</title>
<updated>2020-02-21T07:43:24Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2019-11-27T00:44:33Z</published>
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<id>urn:sha1:f525bb2c9e7cf1e3c43ab57704c9e1c836d30b34</id>
<content type='text'>
The implementation are not only used by TCM but also used by sram on
SOC bus. It follow existed linux tcm software interface, so that old
tcm application codes could be re-used directly.

Software interface list in asm/tcm.h:
 - Variables/Const: 	__tcmdata, __tcmconst
 - Functions:		__tcmfunc, __tcmlocalfunc
 - Malloc/Free:		tcm_alloc, tcm_free

In linux menuconfig:
 - Choose a TCM contain instrctions + data or separated in ITCM/DTCM.
 - Determine TCM_BASE (DTCM_BASE) in phyiscal address.
 - Determine size of TCM or ITCM(DTCM) in page counts.

Here is hello tcm example from Documentation/arm/tcm.rst which could
be directly used:

/* Uninitialized data */
static u32 __tcmdata tcmvar;
/* Initialized data */
static u32 __tcmdata tcmassigned = 0x2BADBABEU;
/* Constant */
static const u32 __tcmconst tcmconst = 0xCAFEBABEU;

static void __tcmlocalfunc tcm_to_tcm(void)
{
	int i;
	for (i = 0; i &lt; 100; i++)
		tcmvar ++;
}

static void __tcmfunc hello_tcm(void)
{
	/* Some abstract code that runs in ITCM */
	int i;
	for (i = 0; i &lt; 100; i++) {
		tcmvar ++;
	}
	tcm_to_tcm();
}

static void __init test_tcm(void)
{
	u32 *tcmem;
	int i;

	hello_tcm();
	printk("Hello TCM executed from ITCM RAM\n");

	printk("TCM variable from testrun: %u @ %p\n", tcmvar, &amp;tcmvar);
	tcmvar = 0xDEADBEEFU;
	printk("TCM variable: 0x%x @ %p\n", tcmvar, &amp;tcmvar);

	printk("TCM assigned variable: 0x%x @ %p\n", tcmassigned, &amp;tcmassigned);

	printk("TCM constant: 0x%x @ %p\n", tcmconst, &amp;tcmconst);

	/* Allocate some TCM memory from the pool */
	tcmem = tcm_alloc(20);
	if (tcmem) {
		printk("TCM Allocated 20 bytes of TCM @ %p\n", tcmem);
		tcmem[0] = 0xDEADBEEFU;
		tcmem[1] = 0x2BADBABEU;
		tcmem[2] = 0xCAFEBABEU;
		tcmem[3] = 0xDEADBEEFU;
		tcmem[4] = 0x2BADBABEU;
		for (i = 0; i &lt; 5; i++)
			printk("TCM tcmem[%d] = %08x\n", i, tcmem[i]);
		tcm_free(tcmem, 20);
	}
}

TODO:
 - Separate fixup mapping from highmem
 - Support abiv1

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
</content>
</entry>
<entry>
<title>csky: Initial stack protector support</title>
<updated>2020-02-21T07:43:24Z</updated>
<author>
<name>Mao Han</name>
<email>han_mao@c-sky.com</email>
</author>
<published>2019-10-11T02:56:55Z</published>
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<id>urn:sha1:2f78c73f78c39dabc5c44ad8dd61fd6ec65636d6</id>
<content type='text'>
This is a basic -fstack-protector support without per-task canary
switching. The protector will report something like when stack
corruption is detected:

It's tested with strcpy local array overflow in sys_kill and get:
stack-protector: Kernel stack is corrupted in: sys_kill+0x23c/0x23c

TODO:
 - Support task switch for different cannary

Signed-off-by: Mao Han &lt;han_mao@c-sky.com&gt;
Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'microblaze-v5.6-rc1' of git://git.monstr.eu/linux-2.6-microblaze</title>
<updated>2020-02-04T11:58:07Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-02-04T11:58:07Z</published>
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<id>urn:sha1:153b5c566d30fb984827acb12fd93c3aa6c147d3</id>
<content type='text'>
Pull Microblaze update from Michal Simek:

 - enable CMA

 - add support for MB v11

 - defconfig updates

 - minor fixes

* tag 'microblaze-v5.6-rc1' of git://git.monstr.eu/linux-2.6-microblaze:
  microblaze: Add ID for Microblaze v11
  microblaze: Prevent the overflow of the start
  microblaze: Wire CMA allocator
  asm-generic: Make dma-contiguous.h a mandatory include/asm header
  microblaze: Sync defconfig with latest Kconfig layout
  microblaze: defconfig: Disable EXT2 driver and Enable EXT3 &amp; EXT4 drivers
  microblaze: Align comments with register usage
</content>
</entry>
<entry>
<title>asm-generic: Make dma-contiguous.h a mandatory include/asm header</title>
<updated>2020-02-04T10:38:59Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2020-01-17T07:48:17Z</published>
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<id>urn:sha1:def3f7cefe4e81c296090e1722a76551142c227c</id>
<content type='text'>
dma-continuguous.h is generic for all architectures except arm32 which has
its own version.

Similar change was done for msi.h by commit a1b39bae16a6
("asm-generic: Make msi.h a mandatory include/asm header")

Suggested-by: Christoph Hellwig &lt;hch@infradead.org&gt;
Link: https://lore.kernel.org/linux-arm-kernel/20200117080446.GA8980@lst.de/T/#m92bb56b04161057635d4142e1b3b9b6b0a70122e
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt; # for arch/riscv

</content>
</entry>
<entry>
<title>mm/vmalloc: Add empty &lt;asm/vmalloc.h&gt; headers and use them from &lt;linux/vmalloc.h&gt;</title>
<updated>2019-12-10T09:12:55Z</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@kernel.org</email>
</author>
<published>2019-11-28T07:19:36Z</published>
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<id>urn:sha1:1f059dfdf5d170dccbac92193be2fee3c1763384</id>
<content type='text'>
In the x86 MM code we'd like to untangle various types of historic
header dependency spaghetti, but for this we'd need to pass to
the generic vmalloc code various vmalloc related defines that
customarily come via the &lt;asm/page.h&gt; low level arch header.

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
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