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<title>pm24.git/arch/x86/kernel/cpu/microcode, branch master</title>
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<updated>2024-11-25T10:43:21Z</updated>
<entry>
<title>x86/microcode/AMD: Flush patch buffer mapping after application</title>
<updated>2024-11-25T10:43:21Z</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2024-11-19T11:21:33Z</published>
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<id>urn:sha1:c809b0d0e52d01c30066367b2952c4c4186b1047</id>
<content type='text'>
Due to specific requirements while applying microcode patches on Zen1
and 2, the patch buffer mapping needs to be flushed from the TLB after
application. Do so.

If not, unnecessary and unnatural delays happen in the boot process.

Reported-by: Thomas De Schampheleire &lt;thomas.de_schampheleire@nokia.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Tested-by: Thomas De Schampheleire &lt;thomas.de_schampheleire@nokia.com&gt;
Cc: &lt;stable@kernel.org&gt; # f1d84b59cbb9 ("x86/mm: Carve out INVLPG inline asm for use by others")
Link: https://lore.kernel.org/r/ZyulbYuvrkshfsd2@antipodes
</content>
</entry>
<entry>
<title>Merge tag 'x86_microcode_for_v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2024-11-19T20:13:16Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-11-19T20:13:16Z</published>
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<id>urn:sha1:ab713e709938ec4045b4cddcd850a0135ae343b4</id>
<content type='text'>
Pull x86 microcode loader update from Borislav Petkov:

 - Remove the unconditional cache writeback and invalidation after
   loading the microcode patch on Intel as this was addressing a
   microcode bug for which there is a concrete microcode revision check
   instead

* tag 'x86_microcode_for_v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/microcode/intel: Remove unnecessary cache writeback and invalidation
</content>
</entry>
<entry>
<title>x86/microcode/intel: Remove unnecessary cache writeback and invalidation</title>
<updated>2024-10-25T16:12:03Z</updated>
<author>
<name>Chang S. Bae</name>
<email>chang.seok.bae@intel.com</email>
</author>
<published>2024-10-01T16:10:36Z</published>
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<id>urn:sha1:9a819753b0209c6edebdea447a1aa53e8c697653</id>
<content type='text'>
Currently, an unconditional cache flush is performed during every
microcode update. Although the original changelog did not mention
a specific erratum, this measure was primarily intended to address
a specific microcode bug, the load of which has already been blocked by
is_blacklisted(). Therefore, this cache flush is no longer necessary.

Additionally, the side effects of doing this have been overlooked. It
increases CPU rendezvous time during late loading, where the cache flush
takes between 1x to 3.5x longer than the actual microcode update.

Remove native_wbinvd() and update the erratum name to align with the
latest errata documentation, document ID 334163 Version 022US.

  [ bp: Zap the flaky documentation URL. ]

Fixes: 91df9fdf5149 ("x86/microcode/intel: Writeback and invalidate caches before updating microcode")
Reported-by: Yan Hua Wu &lt;yanhua1.wu@intel.com&gt;
Reported-by: William Xie &lt;william.xie@intel.com&gt;
Signed-off-by: Chang S. Bae &lt;chang.seok.bae@intel.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Acked-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Tested-by: Yan Hua Wu &lt;yanhua1.wu@intel.com&gt;
Link: https://lore.kernel.org/r/20241001161042.465584-2-chang.seok.bae@intel.com
</content>
</entry>
<entry>
<title>x86/microcode/AMD: Split load_microcode_amd()</title>
<updated>2024-10-22T14:48:00Z</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2024-10-21T08:38:21Z</published>
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<id>urn:sha1:1d81d85d1a19e50d5237dc67d6b825c34ae13de8</id>
<content type='text'>
This function should've been split a long time ago because it is used in
two paths:

1) On the late loading path, when the microcode is loaded through the
   request_firmware interface

2) In the save_microcode_in_initrd() path which collects all the
   microcode patches which are relevant for the current system before
   the initrd with the microcode container has been jettisoned.

   In that path, it is not really necessary to iterate over the nodes on
   a system and match a patch however it didn't cause any trouble so it
   was left for a later cleanup

However, that later cleanup was expedited by the fact that Jens was
enabling "Use L3 as a NUMA node" in the BIOS setting in his machine and
so this causes the NUMA CPU masks used in cpumask_of_node() to be
generated *after* 2) above happened on the first node. Which means, all
those masks were funky, wrong, uninitialized and whatnot, leading to
explosions when dereffing c-&gt;microcode in load_microcode_amd().

So split that function and do only the necessary work needed at each
stage.

Fixes: 94838d230a6c ("x86/microcode/AMD: Use the family,model,stepping encoded in the patch ID")
Reported-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Tested-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Link: https://lore.kernel.org/r/91194406-3fdf-4e38-9838-d334af538f74@kernel.dk
</content>
</entry>
<entry>
<title>x86/microcode/AMD: Pay attention to the stepping dynamically</title>
<updated>2024-10-22T14:37:13Z</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2024-10-21T08:27:52Z</published>
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<id>urn:sha1:d1744a4c975b1acbe8b498356d28afbc46c88428</id>
<content type='text'>
Commit in Fixes changed how a microcode patch is loaded on Zen and newer but
the patch matching needs to happen with different rigidity, depending on what
is being done:

1) When the patch is added to the patches cache, the stepping must be ignored
   because the driver still supports different steppings per system

2) When the patch is matched for loading, then the stepping must be taken into
   account because each CPU needs the patch matching its exact stepping

Take care of that by making the matching smarter.

Fixes: 94838d230a6c ("x86/microcode/AMD: Use the family,model,stepping encoded in the patch ID")
Reported-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Tested-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Link: https://lore.kernel.org/r/91194406-3fdf-4e38-9838-d334af538f74@kernel.dk
</content>
</entry>
<entry>
<title>x86/microcode/AMD: Fix a -Wsometimes-uninitialized clang false positive</title>
<updated>2024-07-30T07:52:43Z</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2024-07-30T07:52:43Z</published>
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<id>urn:sha1:5343558a868e7e635b40baa2e46bf53df1a2d131</id>
<content type='text'>
Initialize equiv_id in order to shut up:

  arch/x86/kernel/cpu/microcode/amd.c:714:6: warning: variable 'equiv_id' is \
  used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
        if (x86_family(bsp_cpuid_1_eax) &lt; 0x17) {
            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

because clang doesn't do interprocedural analysis for warnings to see
that this variable won't be used uninitialized.

Fixes: 94838d230a6c ("x86/microcode/AMD: Use the family,model,stepping encoded in the patch ID")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Closes: https://lore.kernel.org/oe-kbuild-all/202407291815.gJBST0P3-lkp@intel.com/
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
</content>
</entry>
<entry>
<title>x86/microcode/AMD: Use the family,model,stepping encoded in the patch ID</title>
<updated>2024-07-29T07:21:26Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@alien8.de</email>
</author>
<published>2024-07-25T11:20:37Z</published>
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<id>urn:sha1:94838d230a6c835ced1bad06b8759e0a5f19c1d3</id>
<content type='text'>
On Zen and newer, the family, model and stepping is part of the
microcode patch ID so that the equivalence table the driver has been
using, is not needed anymore.

So switch the driver to use that from now on.

The equivalence table in the microcode blob should still remain in case
there's need to pass some additional information to the kernel loader.

Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://lore.kernel.org/r/20240725112037.GBZqI1BbUk1KMlOJ_D@fat_crate.local
</content>
</entry>
<entry>
<title>Merge tag 'x86_microcode_for_v6.10_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2024-05-14T16:09:32Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-05-14T16:09:32Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=a1907ccdfe4a35265f6572e4b8c2da6d1f0a663e'/>
<id>urn:sha1:a1907ccdfe4a35265f6572e4b8c2da6d1f0a663e</id>
<content type='text'>
Pull x86 microcode loader updates from Borislav Petkov:

 - Fix a clang-15 build warning and other cleanups

* tag 'x86_microcode_for_v6.10_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/microcode: Remove unused struct cpu_info_ctx
  x86/microcode/AMD: Remove unused PATCH_MAX_SIZE macro
  x86/microcode/AMD: Avoid -Wformat warning with clang-15
</content>
</entry>
<entry>
<title>x86/microcode: Remove unused struct cpu_info_ctx</title>
<updated>2024-05-06T09:00:57Z</updated>
<author>
<name>Dr. David Alan Gilbert</name>
<email>linux@treblig.org</email>
</author>
<published>2024-05-06T00:43:00Z</published>
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<id>urn:sha1:57f6d0aed7b0a6829044c7f1cea57b1e3ddb9a47</id>
<content type='text'>
This looks unused since

  2071c0aeda22 ("x86/microcode: Simplify init path even more")

Signed-off-by: Dr. David Alan Gilbert &lt;linux@treblig.org&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://lore.kernel.org/r/20240506004300.770564-1-linux@treblig.org
</content>
</entry>
<entry>
<title>x86/microcode/intel: Switch to new Intel CPU model defines</title>
<updated>2024-04-29T08:31:26Z</updated>
<author>
<name>Tony Luck</name>
<email>tony.luck@intel.com</email>
</author>
<published>2024-04-24T18:15:13Z</published>
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<id>urn:sha1:375a756448e29e2fe8944d0a0596da9300da2c26</id>
<content type='text'>
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Dave Hansen &lt;dave.hansen@linux.intel.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://lore.kernel.org/all/20240424181513.41829-1-tony.luck%40intel.com
</content>
</entry>
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