<feed xmlns='http://www.w3.org/2005/Atom'>
<title>pm24.git/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c, branch v6.4</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>https://git.kobert.dev/pm24.git/atom/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c?h=v6.4</id>
<link rel='self' href='https://git.kobert.dev/pm24.git/atom/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c?h=v6.4'/>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/'/>
<updated>2023-05-31T21:34:09Z</updated>
<entry>
<title>drm/amdgpu: add RAS POISON interrupt funcs for jpeg_v4_0</title>
<updated>2023-05-31T21:34:09Z</updated>
<author>
<name>Horatio Zhang</name>
<email>Hongkun.Zhang@amd.com</email>
</author>
<published>2023-05-16T03:02:10Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=bc3e1d60f933f823599376f830eb99451afb995a'/>
<id>urn:sha1:bc3e1d60f933f823599376f830eb99451afb995a</id>
<content type='text'>
Add ras_poison_irq and functions. And fix the amdgpu_irq_put
call trace in jpeg_v4_0_hw_fini.

[   50.497562] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
[   50.497619] RSP: 0018:ffffaa2400fcfcb0 EFLAGS: 00010246
[   50.497620] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 0000000000000000
[   50.497621] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 0000000000000000
[   50.497621] RBP: ffffaa2400fcfcd0 R08: 0000000000000000 R09: 0000000000000000
[   50.497622] R10: 0000000000000000 R11: 0000000000000000 R12: ffff99b2105242d8
[   50.497622] R13: 0000000000000000 R14: ffff99b210500000 R15: ffff99b210500000
[   50.497623] FS:  0000000000000000(0000) GS:ffff99b518480000(0000) knlGS:0000000000000000
[   50.497623] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   50.497624] CR2: 00007f9d32aa91e8 CR3: 00000001ba210000 CR4: 0000000000750ee0
[   50.497624] PKRU: 55555554
[   50.497625] Call Trace:
[   50.497625]  &lt;TASK&gt;
[   50.497627]  jpeg_v4_0_hw_fini+0x43/0xc0 [amdgpu]
[   50.497693]  jpeg_v4_0_suspend+0x13/0x30 [amdgpu]
[   50.497751]  amdgpu_device_ip_suspend_phase2+0x240/0x470 [amdgpu]
[   50.497802]  amdgpu_device_ip_suspend+0x41/0x80 [amdgpu]
[   50.497854]  amdgpu_device_pre_asic_reset+0xd9/0x4a0 [amdgpu]
[   50.497905]  amdgpu_device_gpu_recover.cold+0x548/0xcf1 [amdgpu]
[   50.498005]  amdgpu_debugfs_reset_work+0x4c/0x80 [amdgpu]
[   50.498060]  process_one_work+0x21f/0x400
[   50.498063]  worker_thread+0x200/0x3f0
[   50.498064]  ? process_one_work+0x400/0x400
[   50.498065]  kthread+0xee/0x120
[   50.498067]  ? kthread_complete_and_exit+0x20/0x20
[   50.498068]  ret_from_fork+0x22/0x30

Suggested-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Horatio Zhang &lt;Hongkun.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vcn: fix mmsch ctx table size</title>
<updated>2023-04-18T20:28:50Z</updated>
<author>
<name>Jane Jian</name>
<email>Jane.Jian@amd.com</email>
</author>
<published>2023-04-13T02:49:06Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=4de867fc237487ce2951a8231d7390237d3f3be8'/>
<id>urn:sha1:4de867fc237487ce2951a8231d7390237d3f3be8</id>
<content type='text'>
add jpeg table size to ctx table size rather than override it

Signed-off-by: Jane Jian &lt;Jane.Jian@amd.com&gt;
Reviewed-by: JingWen Chen &lt;JingWen.Chen2@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move vmhub out of amdgpu_ring_funcs (v4)</title>
<updated>2023-04-14T17:47:49Z</updated>
<author>
<name>Le Ma</name>
<email>le.ma@amd.com</email>
</author>
<published>2022-05-19T11:49:59Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=0530553ba842884737a689ae5fac11154dcf3122'/>
<id>urn:sha1:0530553ba842884737a689ae5fac11154dcf3122</id>
<content type='text'>
It looks better to place this field in ring
structure. Also drop the repeated ring funcs definitions
if there's no difference except for vmhub field.

v2: rename the field to vm_hub like others (Le)
v3: apply the changes to new ip blocks (Hawking)
v4: fix vcn sw ring (Alex)

Signed-off-by: Le Ma &lt;le.ma@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/jpeg: enable jpeg v4_0 for sriov</title>
<updated>2023-03-22T04:47:59Z</updated>
<author>
<name>Jane Jian</name>
<email>Jane.Jian@amd.com</email>
</author>
<published>2022-07-08T10:07:38Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=bf35dbc135854c809b5cb6bcce320838c6d1370e'/>
<id>urn:sha1:bf35dbc135854c809b5cb6bcce320838c6d1370e</id>
<content type='text'>
- skip direct jpeg registers read&amp;write since it is not allowed
- reset Doorbell range layout for sriov

Signed-off-by: Jane Jian &lt;Jane.Jian@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move jpeg ras block init to ras sw_init</title>
<updated>2023-03-13T21:27:48Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-03-11T09:28:02Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=5640e06e60198d9abdf6c618c54d982d8ec9cc0a'/>
<id>urn:sha1:5640e06e60198d9abdf6c618c54d982d8ec9cc0a</id>
<content type='text'>
Initialize jpeg ras block only when jpeg ip block
supports ras features. Driver queries ras capabilities
after early_init, ras block init needs to be moved to
sw_int.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add JPEG 4.0 RAS poison consumption handling</title>
<updated>2022-11-17T23:08:46Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2022-10-20T09:35:36Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=86e8255f941e86e69de7b13a6f716adfc04b77b3'/>
<id>urn:sha1:86e8255f941e86e69de7b13a6f716adfc04b77b3</id>
<content type='text'>
Register related irq handler.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add RAS error query for JPEG 4.0</title>
<updated>2022-11-17T23:08:27Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2022-10-20T08:48:50Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=53317458013323e16001ca20e47b08fbe96e851c'/>
<id>urn:sha1:53317458013323e16001ca20e47b08fbe96e851c</id>
<content type='text'>
Initialize JPEG RAS structure and add error query interface.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/jpeg: add jpeg support for VCN4_0_0</title>
<updated>2022-05-04T14:43:56Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2021-10-09T20:58:10Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=b13111de32a9202c6d58bb7e4c06296b99c4d7e3'/>
<id>urn:sha1:b13111de32a9202c6d58bb7e4c06296b99c4d7e3</id>
<content type='text'>
Add jpeg support for VCN4_0_0.

Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Sonny Jiang &lt;sonny.jiang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
