pm24.git/drivers/gpu/drm/amd/display/dc/dsc, branch master

drm/amd/display: remove redundant is_dsc_possible check

2024-11-20T14:38:16Z

Since is_dsc_possible is already checked just above, there's no need to check it again before filling out the DSC settings. Signed-off-by: Bhavin Sharma Signed-off-by: Alex Deucher

drm/amd/display: Add HDMI DSC native YCbCr422 support

2024-09-18T20:15:07Z

[WHY && HOW] For some HDMI OVT timing, YCbCr422 encoding fails at the DSC bandwidth check. The root cause is our DSC policy for timing doesn't account for HDMI YCbCr422 native support. Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Reviewed-by: Chris Park Signed-off-by: Leo Ma Signed-off-by: Alex Hung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Implement new DPCD register handling

2024-09-18T20:15:06Z

[WHY] There are some monitor timings that seem to be supported without DSC but actually require DSC to be displayed. A VESA SCR introduced a new max uncompressed pixel rate cap register that we can use to handle these edge cases. [HOW] SST: Read caps from link and invalidate timings that exceed the max limit but do not support DSC. Then check for options override when determining BPP. MST: Read caps from virtual DPCD peer device or daisy chained SST monitor and set validation set BPPs to max if pixel rate exceeds uncompressed limit. Validation set optimization continues as normal. Reviewed-by: Wenjing Liu Signed-off-by: Ryan Seto Signed-off-by: Alex Hung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Make dcn401_dsc_funcs static

2024-08-23T14:53:42Z

The sparse tool complains as follows: drivers/gpu/drm/amd/amdgpu/../display/dc/dsc/dcn401/dcn401_dsc.c:30:24: warning: symbol 'dcn401_dsc_funcs' was not declared. Should it be static? This symbol is not used outside of dcn401_dsc.c, so marks it static. Signed-off-by: Jinjie Ruan Signed-off-by: Alex Deucher

drm/amd/display: Adjust reg field for DSC wait for disconnect

2024-06-27T21:10:38Z

[WHY] DSC was waiting for the wrong field to disconnect cleanly. [HOW] Changed field the DSC disconnect was waiting on. Reviewed-by: Wenjing Liu Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Signed-off-by: Alex Hung Signed-off-by: Ryan Seto Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Reset DSC memory status

2024-06-27T21:10:37Z

[WHY] When system exits idle state followed by enabling the display, DSC memory may still be forced in a deep sleep or shutdown state. Intermittent DSC corruption is seen when display is visible. [HOW] When DSC is enabled, reset dsc memory to force and disable status. Reviewed-by: Nicholas Kazlauskas Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Signed-off-by: Alex Hung Signed-off-by: Duncan Ma Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Remove unused code

2024-05-29T18:39:33Z

This commit removes some unused code with the required adjustments. Signed-off-by: Rodrigo Siqueira Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Fix POWERPC_64 compilation

2024-05-20T20:20:25Z

[Why] Compilation errors while compiling without CONFIG_DRM_AMD_DC_FP: "undefined reference to `dc_bandwidth_in_kbps_from_timing'" [How] Fix Makefile to move dsc files out of DC_FP guard. Fixes: 00c391102abc ("drm/amd/display: Add misc DC changes for DCN401") Reviewed-by: Aurabindo Pillai Signed-off-by: Roman Li Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Move DSC functions from dc.c to dc_dsc.c

2024-05-20T20:19:08Z

Move dsc functions from dc.c to dc_dsc.c. Co-developed-by: George Shen Signed-off-by: George Shen Signed-off-by: Wenjing Liu Reviewed-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Allow higher DSC slice support for small timings on dcn401

2024-05-13T19:47:28Z

[WHY] DML2.1 has added the support to determine ODM combine based on DSC slice count limitation. This support would allow us to support DSC slice higher than 4 on small timings. The change will allow higher DSC slice support independent from pixel clock in use. [HOW] Add a DCN401 get_enc_caps function to allow the support for DSC slice count higher than 4. Reviewed-by: Dillon Varone Acked-by: Alex Hung Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher