<feed xmlns='http://www.w3.org/2005/Atom'>
<title>pm24.git/drivers/gpu/drm/amd/display/dc/inc, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>https://git.kobert.dev/pm24.git/atom/drivers/gpu/drm/amd/display/dc/inc?h=master</id>
<link rel='self' href='https://git.kobert.dev/pm24.git/atom/drivers/gpu/drm/amd/display/dc/inc?h=master'/>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/'/>
<updated>2024-12-02T23:35:32Z</updated>
<entry>
<title>drm/amd/display: Add hblank borrowing support</title>
<updated>2024-12-02T23:35:32Z</updated>
<author>
<name>Chris Park</name>
<email>chris.park@amd.com</email>
</author>
<published>2024-11-15T20:44:52Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=0c0a19430bfdfedab437e77b9262e8e62ced384e'/>
<id>urn:sha1:0c0a19430bfdfedab437e77b9262e8e62ced384e</id>
<content type='text'>
[WHY]
Some DSC timing failed at bandwidth validation due to hactive
can't be evenly divided on each ODM segment.

[HOW]
Borrow from hblank to increase hactive to support these timing.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Chris Park &lt;chris.park@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add option to retrieve detile buffer size</title>
<updated>2024-12-02T23:35:20Z</updated>
<author>
<name>Sung Lee</name>
<email>Sung.Lee@amd.com</email>
</author>
<published>2024-11-14T19:18:13Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=6a7fd76b949efe40fb6d6677f480e624e0cb6e40'/>
<id>urn:sha1:6a7fd76b949efe40fb6d6677f480e624e0cb6e40</id>
<content type='text'>
[WHY]
For better power profiling knowing the detile
buffer size at a given point in time
would be useful.

[HOW]
Add interface to retrieve detile buffer from
dc state.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Signed-off-by: Sung Lee &lt;Sung.Lee@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable Request rate limiter during C-State on dcn401</title>
<updated>2024-11-20T14:39:42Z</updated>
<author>
<name>Dillon Varone</name>
<email>dillon.varone@amd.com</email>
</author>
<published>2024-11-01T14:51:02Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=89713ce5518eda6b370c7a17edbcab4f97a39f68'/>
<id>urn:sha1:89713ce5518eda6b370c7a17edbcab4f97a39f68</id>
<content type='text'>
[WHY]
When C-State entry is requested, the rate limiter will be disabled
which can result in high contention in the DCHUB return path.

[HOW]
Enable the rate limiter during C-state requests to prevent contention.

Cc: stable@vger.kernel.org # 6.11+
Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Prune Invalid Modes For HDMI Output</title>
<updated>2024-11-04T16:40:51Z</updated>
<author>
<name>Fangzhi Zuo</name>
<email>Jerry.Zuo@amd.com</email>
</author>
<published>2024-10-17T22:15:10Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=abdd2768d7630bc8ec3403aea24f4197bada3c1f'/>
<id>urn:sha1:abdd2768d7630bc8ec3403aea24f4197bada3c1f</id>
<content type='text'>
[Why]
1. HDMI does not have 6 bpc support. Having 6 bpc pass validation
does not comply with spec.
2. Validate 420 only for native HDMI, but not apply to pcon use
case.
3. Current mode validation log is not readable.

[how]
1. Cap 8 bpc for dp-hdmi converter.
2. Validate yuv420 for pcon use case as well,
   if rgb/yuv444 8bpc cannot fit into pcon bw limitation of
   the link from the converter to HDMI sink.
3. Add readable pixel_format and color_depth into debug log.

Reviewed-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Fangzhi Zuo &lt;Jerry.Zuo@amd.com&gt;
Signed-off-by: Zaeem Mohamed &lt;zaeem.mohamed@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Implement new backlight_level_params structure</title>
<updated>2024-11-04T16:40:43Z</updated>
<author>
<name>Kaitlyn Tse</name>
<email>Kaitlyn.Tse@amd.com</email>
</author>
<published>2024-10-03T22:13:27Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=38077562e0594a294eaf4d8e6bbd8c1c26c2540f'/>
<id>urn:sha1:38077562e0594a294eaf4d8e6bbd8c1c26c2540f</id>
<content type='text'>
[Why]
Implement the new backlight_level_params structure as part of the VBAC
framework, the information in this structure is needed to be passed down
to the DMCUB to identify the backlight control type, to adjust the
backlight of the panel and to perform any required conversions from PWM
to nits or vice versa.

[How]
Modified existing functions to include the new backlight_level_params
structure.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Kaitlyn Tse &lt;Kaitlyn.Tse@amd.com&gt;
Signed-off-by: Zaeem Mohamed &lt;zaeem.mohamed@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add P-State Stall Timeout Recovery Support for dcn401</title>
<updated>2024-10-28T20:32:35Z</updated>
<author>
<name>Dillon Varone</name>
<email>dillon.varone@amd.com</email>
</author>
<published>2024-10-11T17:51:11Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=c6df6213a95fa9674cc48d77042141942dd0809b'/>
<id>urn:sha1:c6df6213a95fa9674cc48d77042141942dd0809b</id>
<content type='text'>
[WHY&amp;HOW]
Adds support for P-State stall timeout detection in DCHUBBUB.

Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add 3DLUT FL HW bug workaround</title>
<updated>2024-10-15T15:23:12Z</updated>
<author>
<name>Ilya Bakoulin</name>
<email>Ilya.Bakoulin@amd.com</email>
</author>
<published>2024-09-16T18:38:19Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=df60dcf5b58a642e531609d0d673bb63a11ed06e'/>
<id>urn:sha1:df60dcf5b58a642e531609d0d673bb63a11ed06e</id>
<content type='text'>
[Why]
There is a known HW bug that causes the internal 3DLUT fetch signal to
be lost at VREADY, regardless of whether the OTG lock is being held or
not. A workaround is necessary to make sure that this internal signal
stays up after OTG unlock.

[How]
Set the 3DLUT_ENABLE bit immediately before and after the unlock. Also
use VUPDATE_KEEPOUT to prevent lock transition in the region between
VSTARTUP and VREADY, which could cause issues with this WA sequence.

Also including misc. 3DLUT DMA-related sequence fixes to address a few
regressions causing corruption.

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update Interface to Check UCLK DPM</title>
<updated>2024-10-07T18:16:44Z</updated>
<author>
<name>Austin Zheng</name>
<email>Austin.Zheng@amd.com</email>
</author>
<published>2024-09-10T20:41:20Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=d016d0dd5a57a6c11847bf750c4177e5ad219190'/>
<id>urn:sha1:d016d0dd5a57a6c11847bf750c4177e5ad219190</id>
<content type='text'>
[Why]
Videos using YUV420 format may result in high power being used.
Disabling MPO may result in lower power usage.
Update interface that can be used to check power profile of a dc_state.

[How]
Add helper functions that can be used to determine power level:
- get power profile after a dc_state has undergone full validation

Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Signed-off-by: Austin Zheng &lt;Austin.Zheng@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Revert commit Update Interface to Check UCLK DPM</title>
<updated>2024-10-07T18:10:40Z</updated>
<author>
<name>Austin Zheng</name>
<email>Austin.Zheng@amd.com</email>
</author>
<published>2024-09-23T14:07:32Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=0e93b76cf92f229409e8da85c2a143868835fec3'/>
<id>urn:sha1:0e93b76cf92f229409e8da85c2a143868835fec3</id>
<content type='text'>
This reverts commit b8d046985c2dc41a0e264a391da4606099f8d44f.

Reverting as regression discovered on certain systems and golden values
need to updated.

Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Signed-off-by: Austin Zheng &lt;Austin.Zheng@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update Interface to Check UCLK DPM</title>
<updated>2024-10-01T21:33:02Z</updated>
<author>
<name>Austin Zheng</name>
<email>Austin.Zheng@amd.com</email>
</author>
<published>2024-09-10T20:41:20Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=b8d046985c2dc41a0e264a391da4606099f8d44f'/>
<id>urn:sha1:b8d046985c2dc41a0e264a391da4606099f8d44f</id>
<content type='text'>
[Why]
Videos using YUV420 format may result in high power being used.
Disabling MPO may result in lower power usage.
Update interface that can be used to check power profile of a dc_state.

[How]
Allow pstate switching in VBlank as last entry in strategy candidates.
Add helper functions that can be used to determine power level:
-get power profile after a dc_state has undergone full validation

Reviewed-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Signed-off-by: Austin Zheng &lt;Austin.Zheng@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
