<feed xmlns='http://www.w3.org/2005/Atom'>
<title>pm24.git/drivers/gpu/drm/amd/display/dc, branch v6.4</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<id>https://git.kobert.dev/pm24.git/atom?h=v6.4</id>
<link rel='self' href='https://git.kobert.dev/pm24.git/atom?h=v6.4'/>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/'/>
<updated>2023-06-13T21:16:35Z</updated>
<entry>
<title>drm/amd/display: limit DPIA link rate to HBR3</title>
<updated>2023-06-13T21:16:35Z</updated>
<author>
<name>Peichen Huang</name>
<email>peichen.huang@amd.com</email>
</author>
<published>2023-05-31T05:36:14Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=7c5835bcb9176df94683396f1c0e5df6bf5094b3'/>
<id>urn:sha1:7c5835bcb9176df94683396f1c0e5df6bf5094b3</id>
<content type='text'>
[Why]
DPIA doesn't support UHBR, driver should not enable UHBR
for dp tunneling

[How]
limit DPIA link rate to HBR3

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Peichen Huang &lt;peichen.huang@amd.com&gt;
Reviewed-by: Mustapha Ghaddar &lt;Mustapha.Ghaddar@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Reduce sdp bw after urgent to 90%</title>
<updated>2023-06-07T21:02:25Z</updated>
<author>
<name>Alvin Lee</name>
<email>alvin.lee2@amd.com</email>
</author>
<published>2023-05-19T15:38:15Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=e1a600208286c197c2696e51fc313e49889315bd'/>
<id>urn:sha1:e1a600208286c197c2696e51fc313e49889315bd</id>
<content type='text'>
[Description]
Reduce expected SDP bandwidth due to poor QoS and
arbitration issues on high bandwidth configs

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Reviewed-by: Nevenko Stupar &lt;Nevenko.Stupar@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add ODM case when looking for first split pipe</title>
<updated>2023-06-07T20:55:39Z</updated>
<author>
<name>Samson Tam</name>
<email>samson.tam@amd.com</email>
</author>
<published>2023-05-09T20:40:19Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=59de751e3845d699e02dc4da47322b92d83a41e2'/>
<id>urn:sha1:59de751e3845d699e02dc4da47322b92d83a41e2</id>
<content type='text'>
[Why]
When going from ODM 2:1 single display case to max displays, second
odm pipe needs to be repurposed for one of the new single displays.
However, acquire_first_split_pipe() only handles MPC case and not
ODM case

[How]
Add ODM conditions in acquire_first_split_pipe()
Add commit_minimal_transition_state() in commit_streams() to handle
odm 2:1 exit first, and then process new streams
Handle ODM condition in commit_minimal_transition_state()

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Samson Tam &lt;samson.tam@amd.com&gt;
Reviewed-by: Alvin Lee &lt;Alvin.Lee2@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amd/display: Do not set drr on pipe commit"</title>
<updated>2023-05-31T21:28:47Z</updated>
<author>
<name>Michel Dänzer</name>
<email>mdaenzer@redhat.com</email>
</author>
<published>2023-05-22T13:08:23Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=8e1b45c578b799510f9a01a9745a737e74f43cb1'/>
<id>urn:sha1:8e1b45c578b799510f9a01a9745a737e74f43cb1</id>
<content type='text'>
This reverts commit 474f01015ffdb74e01c2eb3584a2822c64e7b2be.

Caused a regression:

Samsung Odyssey Neo G9, running at 5120x1440@240/VRR, connected to Navi
21 via DisplayPort, blanks and the GPU hangs while starting the Steam
game Assetto Corsa Competizione (via Proton 7.0).

Example dmesg excerpt:

 amdgpu 0000:0c:00.0: [drm] ERROR [CRTC:82:crtc-0] flip_done timed out
 NMI watchdog: Watchdog detected hard LOCKUP on cpu 6
 [...]
 RIP: 0010:amdgpu_device_rreg.part.0+0x2f/0xf0 [amdgpu]
 Code: 41 54 44 8d 24 b5 00 00 00 00 55 89 f5 53 48 89 fb 4c 3b a7 60 0b 00 00 73 6a 83 e2 02 74 29 4c 03 a3 68 0b 00 00 45 8b 24 24 &lt;48&gt; 8b 43 08 0f b7 70 3e 66 90 44 89 e0 5b 5d 41 5c 31 d2 31 c9 31
 RSP: 0000:ffffb39a119dfb88 EFLAGS: 00000086
 RAX: ffffffffc0eb96a0 RBX: ffff9e7963dc0000 RCX: 0000000000007fff
 RDX: 0000000000000000 RSI: 0000000000004ff6 RDI: ffff9e7963dc0000
 RBP: 0000000000004ff6 R08: ffffb39a119dfc40 R09: 0000000000000010
 R10: ffffb39a119dfc40 R11: ffffb39a119dfc44 R12: 00000000000e05ae
 R13: 0000000000000000 R14: ffff9e7963dc0010 R15: 0000000000000000
 FS:  000000001012f6c0(0000) GS:ffff9e805eb80000(0000) knlGS:000000007fd40000
 CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
 CR2: 00000000461ca000 CR3: 00000002a8a20000 CR4: 0000000000350ee0
 Call Trace:
  &lt;TASK&gt;
  dm_read_reg_func+0x37/0xc0 [amdgpu]
  generic_reg_get2+0x22/0x60 [amdgpu]
  optc1_get_crtc_scanoutpos+0x6a/0xc0 [amdgpu]
  dc_stream_get_scanoutpos+0x74/0x90 [amdgpu]
  dm_crtc_get_scanoutpos+0x82/0xf0 [amdgpu]
  amdgpu_display_get_crtc_scanoutpos+0x91/0x190 [amdgpu]
  ? dm_read_reg_func+0x37/0xc0 [amdgpu]
  amdgpu_get_vblank_counter_kms+0xb4/0x1a0 [amdgpu]
  dm_pflip_high_irq+0x213/0x2f0 [amdgpu]
  amdgpu_dm_irq_handler+0x8a/0x200 [amdgpu]
  amdgpu_irq_dispatch+0xd4/0x220 [amdgpu]
  amdgpu_ih_process+0x7f/0x110 [amdgpu]
  amdgpu_irq_handler+0x1f/0x70 [amdgpu]
  __handle_irq_event_percpu+0x46/0x1b0
  handle_irq_event+0x34/0x80
  handle_edge_irq+0x9f/0x240
  __common_interrupt+0x66/0x110
  common_interrupt+0x5c/0xd0
  asm_common_interrupt+0x22/0x40

Reviewed-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Michel Dänzer &lt;mdaenzer@redhat.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amd/display: Block optimize on consecutive FAMS enables"</title>
<updated>2023-05-31T20:48:34Z</updated>
<author>
<name>Michel Dänzer</name>
<email>mdaenzer@redhat.com</email>
</author>
<published>2023-05-22T13:08:22Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=c14fb01c4629b96b64ab54caea7e543a0239f14e'/>
<id>urn:sha1:c14fb01c4629b96b64ab54caea7e543a0239f14e</id>
<content type='text'>
This reverts commit ce560ac40272a5c8b5b68a9d63a75edd9e66aed2.

It depends on its parent commit, which we want to revert.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Michel Dänzer &lt;mdaenzer@redhat.com&gt;
[Hamza: fix a whitespace issue in dcn30_prepare_bandwidth()]
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: enable dpia validate</title>
<updated>2023-05-18T13:58:35Z</updated>
<author>
<name>Mustapha Ghaddar</name>
<email>mghaddar@amd.com</email>
</author>
<published>2023-04-28T16:13:21Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=6d600229df1ed06f46ba68ac706d9f44ba8c5fb4'/>
<id>urn:sha1:6d600229df1ed06f46ba68ac706d9f44ba8c5fb4</id>
<content type='text'>
Use dpia_validate_usb4_bw() function

Fixes: a8b537605e22 ("drm/amd/display: Add function pointer for validate bw usb4")
Reviewed-by: Roman Li &lt;roman.li@amd.com&gt;
Reviewed-by: Meenakshikumar Somasundaram &lt;meenakshikumar.somasundaram@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Mustapha Ghaddar &lt;mghaddar@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enforce 60us prefetch for 200Mhz DCFCLK modes</title>
<updated>2023-05-11T05:08:25Z</updated>
<author>
<name>Alvin Lee</name>
<email>Alvin.Lee2@amd.com</email>
</author>
<published>2023-04-27T19:10:13Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=b504f99ccaa64da364443431e388ecf30b604e38'/>
<id>urn:sha1:b504f99ccaa64da364443431e388ecf30b604e38</id>
<content type='text'>
[Description]
- Due to bandwidth / arbitration issues at 200Mhz DCFCLK,
  we want to enforce minimum 60us of prefetch to avoid
  intermittent underflow issues
- Since 60us prefetch is already enforced for UCLK DPM0,
  and many DCFCLK's &gt; 200Mhz are mapped to UCLK DPM1, in
  theory there should not be any UCLK DPM regressions by
  enforcing greater prefetch

Reviewed-by: Nevenko Stupar &lt;Nevenko.Stupar@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Alvin Lee &lt;Alvin.Lee2@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add symclk workaround during disable link output</title>
<updated>2023-05-11T05:08:00Z</updated>
<author>
<name>Leo Chen</name>
<email>sancchen@amd.com</email>
</author>
<published>2023-04-26T20:02:28Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=f57fa0f23d9707747272b0d09af8b93b19cf8ee4'/>
<id>urn:sha1:f57fa0f23d9707747272b0d09af8b93b19cf8ee4</id>
<content type='text'>
[Why &amp; How]
This is originally a change (9c75891f) in DCN32 because of the lack
of interface to set TX while keeping symclk on. Adding this workaround
to DCN314 will resolve the current issue.

Fixes: 9c75891feef0 ("drm/amd/display: rework recent update PHY state commit")
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Leo Chen &lt;sancchen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-next-2023-05-05' of git://anongit.freedesktop.org/drm/drm</title>
<updated>2023-05-05T18:49:22Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2023-05-05T18:49:22Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=084f51d473cd566eab310d5da56fe7b68d0b10be'/>
<id>urn:sha1:084f51d473cd566eab310d5da56fe7b68d0b10be</id>
<content type='text'>
Pull more drm fixes from Dave Airlie:
 "This is the fixes for the last couple of weeks for i915 and last 3
  weeks for amdgpu, lots of them but pretty scattered around and all
  pretty small.

  amdgpu:
   - SR-IOV fixes
   - DCN 3.2 fixes
   - DC mclk handling fixes
   - eDP fixes
   - SubVP fixes
   - HDCP regression fix
   - DSC fixes
   - DC FP fixes
   - DCN 3.x fixes
   - Display flickering fix when switching between vram and gtt
   - Z8 power saving fix
   - Fix hang when skipping modeset
   - GPU reset fixes
   - Doorbell fix when resizing BARs
   - Fix spurious warnings in gmc
   - Locking fix for AMDGPU_SCHED IOCTL
   - SR-IOV fix
   - DCN 3.1.4 fix
   - DCN 3.2 fix
   - Fix job cleanup when CS is aborted

  i915:
   - skl pipe source size check
   - mtl transcoder mask fix
   - DSI power on sequence fix
   - GuC versioning corner case fix"

* tag 'drm-next-2023-05-05' of git://anongit.freedesktop.org/drm/drm: (48 commits)
  drm/amdgpu: drop redundant sched job cleanup when cs is aborted
  drm/amd/display: filter out invalid bits in pipe_fuses
  drm/amd/display: Change default Z8 watermark values
  drm/amdgpu: disable SDMA WPTR_POLL_ENABLE for SR-IOV
  drm/amdgpu: add a missing lock for AMDGPU_SCHED
  drm/amdgpu: fix an amdgpu_irq_put() issue in gmc_v9_0_hw_fini()
  drm/amdgpu: fix amdgpu_irq_put call trace in gmc_v10_0_hw_fini
  drm/amdgpu: fix amdgpu_irq_put call trace in gmc_v11_0_hw_fini
  drm/amdgpu: Enable doorbell selfring after resize FB BAR
  drm/amdgpu: Use the default reset when loading or reloading the driver
  drm/amdgpu: Fix mode2 reset for sienna cichlid
  drm/i915/dsi: Use unconditional msleep() instead of intel_dsi_msleep()
  drm/i915/mtl: Add the missing CPU transcoder mask in intel_device_info
  drm/i915/guc: Actually return an error if GuC version range check fails
  drm/amd/display: Lowering min Z8 residency time
  drm/amd/display: fix flickering caused by S/G mode
  drm/amd/display: Set min_width and min_height capability for DCN30
  drm/amd/display: Isolate remaining FPU code in DCN32
  drm/amd/display: Update bounding box values for DCN321
  drm/amd/display: Do not clear GPINT register when releasing DMUB from reset
  ...
</content>
</entry>
<entry>
<title>drm/amd/display: filter out invalid bits in pipe_fuses</title>
<updated>2023-05-04T03:10:02Z</updated>
<author>
<name>Samson Tam</name>
<email>Samson.Tam@amd.com</email>
</author>
<published>2023-04-19T22:17:14Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=682439fffad9fa9a38d37dd1b1318e9374232213'/>
<id>urn:sha1:682439fffad9fa9a38d37dd1b1318e9374232213</id>
<content type='text'>
[Why]
Reading pipe_fuses from register may have invalid bits set, which may
 affect the num_pipes erroneously.

[How]
Add read_pipes_fuses() call and filter bits based on expected number
 of pipes.

Reviewed-by: Alvin Lee &lt;Alvin.Lee2@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Samson Tam &lt;Samson.Tam@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.1.x
</content>
</entry>
</feed>
