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<title>pm24.git/drivers/gpu/drm/amd/display/modules, branch v6.7</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<id>https://git.kobert.dev/pm24.git/atom?h=v6.7</id>
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<updated>2024-01-04T14:48:15Z</updated>
<entry>
<title>drm/amd/display: Fix sending VSC (+ colorimetry) packets for DP/eDP displays without PSR</title>
<updated>2024-01-04T14:48:15Z</updated>
<author>
<name>Joshua Ashton</name>
<email>joshua@froggi.es</email>
</author>
<published>2024-01-01T18:28:22Z</published>
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<id>urn:sha1:202260f64519e591b5cd99626e441b6559f571a3</id>
<content type='text'>
The check for sending the vsc infopacket to the display was gated behind
PSR (Panel Self Refresh) being enabled.

The vsc infopacket also contains the colorimetry (specifically the
container color gamut) information for the stream on modern DP.

PSR is typically only supported on mobile phone eDP displays, thus this
was not getting sent for typical desktop monitors or TV screens.

This functionality is needed for proper HDR10 functionality on DP as it
wants BT2020 RGB/YCbCr for the container color space.

Cc: stable@vger.kernel.org
Cc: Harry Wentland &lt;harry.wentland@amd.com&gt;
Cc: Xaver Hugl &lt;xaver.hugl@gmail.com&gt;
Cc: Melissa Wen &lt;mwen@igalia.com&gt;
Fixes: 15f9dfd545a1 ("drm/amd/display: Register Colorspace property for DP and HDMI")
Tested-by: Simon Berz &lt;simon@berz.me&gt;
Tested-by: Xaver Hugl &lt;xaver.hugl@kde.org&gt;
Signed-off-by: Joshua Ashton &lt;joshua@froggi.es&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Disable PSR-SU on Parade 0803 TCON again</title>
<updated>2023-12-12T17:01:44Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-06-19T20:04:24Z</published>
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<id>urn:sha1:e7ab758741672acb21c5d841a9f0309d30e48a06</id>
<content type='text'>
When screen brightness is rapidly changed and PSR-SU is enabled the
display hangs on panels with this TCON even on the latest DCN 3.1.4
microcode (0x8002a81 at this time).

This was disabled previously as commit 072030b17830 ("drm/amd: Disable
PSR-SU on Parade 0803 TCON") but reverted as commit 1e66a17ce546 ("Revert
"drm/amd: Disable PSR-SU on Parade 0803 TCON"") in favor of testing for
a new enough microcode (commit cd2e31a9ab93 ("drm/amd/display: Set minimum
requirement for using PSR-SU on Phoenix")).

As hangs are still happening specifically with this TCON, disable PSR-SU
again for it until it can be root caused.

Cc: stable@vger.kernel.org
Cc: aaron.ma@canonical.com
Cc: binli@gnome.org
Cc: Marc Rossi &lt;Marc.Rossi@amd.com&gt;
Cc: Hamza Mahfooz &lt;Hamza.Mahfooz@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2046131
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: VSIF v3 set Max Refresh Rate</title>
<updated>2023-10-09T20:53:02Z</updated>
<author>
<name>Muhammad Ansari</name>
<email>muhammad.ansari@amd.com</email>
</author>
<published>2023-09-25T16:00:31Z</published>
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<id>urn:sha1:43693e859b328db6017e51e93b4da36fe64d6e47</id>
<content type='text'>
[WHY]
FreeSync spec requires PB8 and PB12 to be set to nominal
refresh rate regardless of fixed rate or variable

[HOW]
Removed the condition that checks and overwrites max refresh rate
and set PB8/PB12 to be set to max refresh rate always

Reviewed-by: Anthony Koo &lt;anthony.koo@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Muhammad Ansari &lt;muhammad.ansari@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Clean up code warnings</title>
<updated>2023-10-04T22:42:01Z</updated>
<author>
<name>Aric Cyr</name>
<email>aric.cyr@amd.com</email>
</author>
<published>2023-09-19T00:33:15Z</published>
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<id>urn:sha1:889d55154516ec8f98ea953e8660963f2e29c75d</id>
<content type='text'>
- Fix constness of string parameters
- Fix zero-initialization of structs which cannot take a 0 literal as the
  first field, for example enums

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix problems in power_helper</title>
<updated>2023-10-04T22:35:56Z</updated>
<author>
<name>Wayne Lin</name>
<email>Wayne.Lin@amd.com</email>
</author>
<published>2023-09-22T04:04:39Z</published>
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<id>urn:sha1:52ed23dc29db2fe80e8332200e66a0e5a5c20683</id>
<content type='text'>
[Why &amp; How]
Fix following problems:
- In abm config, forget to initialize config.ambient_thresholds_lux.
- Adjust the coding style problem
- Restrict to call psr_su_set_dsc_slice_height() under edp only

Reviewed-by: Robin Chen &lt;robin.chen@amd.com&gt;
Signed-off-by: Wayne Lin &lt;Wayne.Lin@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: prevent potential division by zero errors</title>
<updated>2023-09-06T18:32:39Z</updated>
<author>
<name>Hamza Mahfooz</name>
<email>hamza.mahfooz@amd.com</email>
</author>
<published>2023-09-05T17:27:22Z</published>
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<id>urn:sha1:084f658ece139645d203fa09c77c7f96cb849bb7</id>
<content type='text'>
There are two places in apply_below_the_range() where it's possible for
a divide by zero error to occur. So, to fix this make sure the divisor
is non-zero before attempting the computation in both cases.

Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2637
Fixes: a463b263032f ("drm/amd/display: Fix frames_to_insert math")
Fixes: ded6119e825a ("drm/amd/display: Reinstate LFC optimization")
Reviewed-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: PQ regamma end point</title>
<updated>2023-08-30T18:58:38Z</updated>
<author>
<name>Krunoslav Kovac</name>
<email>krunoslav.kovac@amd.com</email>
</author>
<published>2023-08-08T20:38:56Z</published>
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<id>urn:sha1:959d2fc47f14f7f5ab3f74530e80c9407ced91f2</id>
<content type='text'>
[WHY &amp; HOW]
PQ has a fixed range of 0-10,000 nits.
Using 1=80 nits normalization, PQ should map to 1.0 for X=125.0
HW LUT used for interpolation does not have X=125 so it's interpolated.
However, we cap Y to 1 for all X&gt;=125.

The closest larger HW point is 128.
What we want is Y(128) such that interpolation through 125 gives 1.0.
Such value is ~1.00256.
Another change is to hardcode PQ table, we pretty much always have 1=80
normalization so the table can be static.

Reviewed-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Krunoslav Kovac &lt;krunoslav.kovac@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update adaptive sync infopackets for replay</title>
<updated>2023-08-15T22:08:30Z</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2023-06-28T15:57:51Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=81a7be799af7cfb37e24f4d94bde8dcc8fb34c8a'/>
<id>urn:sha1:81a7be799af7cfb37e24f4d94bde8dcc8fb34c8a</id>
<content type='text'>
Update infopackets for replay

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Clean up errors in color_gamma.c</title>
<updated>2023-08-09T13:42:47Z</updated>
<author>
<name>Ran Sun</name>
<email>sunran001@208suo.com</email>
</author>
<published>2023-08-02T02:39:55Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=3646a89db179a2ff91642d26a59ca01de3ac3cd5'/>
<id>urn:sha1:3646a89db179a2ff91642d26a59ca01de3ac3cd5</id>
<content type='text'>
Fix the following errors reported by checkpatch:

ERROR: trailing whitespace
ERROR: else should follow close brace '}'

Signed-off-by: Ran Sun &lt;sunran001@208suo.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add Freesync Panel DM code</title>
<updated>2023-08-07T21:14:07Z</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2023-05-12T18:26:10Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=dede1fea4460e734f0ef85875718a036bdd18649'/>
<id>urn:sha1:dede1fea4460e734f0ef85875718a036bdd18649</id>
<content type='text'>
We need certain conditions for replay to be enabled, so create an
interface in DM to enable/disable replay.

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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