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<title>pm24.git/drivers/gpu/drm/amd/include, branch v4.5</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<id>https://git.kobert.dev/pm24.git/atom?h=v4.5</id>
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<updated>2016-02-08T15:37:47Z</updated>
<entry>
<title>drma/dmgpu: move cg and pg flags into shared headers</title>
<updated>2016-02-08T15:37:47Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-02-05T15:56:22Z</published>
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<id>urn:sha1:e3b04bc790ecd6d08d4699bc60b4f5a76f7f7b6b</id>
<content type='text'>
So they can be used by powerplay.

Reviewed-by: Eric Huang &lt;JinHuiEric.Huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add a cgs interface to fetch cg and pg flags</title>
<updated>2016-02-08T15:37:46Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-02-05T15:34:28Z</published>
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<id>urn:sha1:08d334087617ed9662d40db776c5d2c0a614315a</id>
<content type='text'>
Needed to pass the cg and pg info to powerplay.

Reviewed-by: Eric Huang &lt;JinHuiEric.Huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/cgs: add an interface to access PCI resources</title>
<updated>2016-01-11T14:52:43Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-12-23T16:25:43Z</published>
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<id>urn:sha1:ba228ac8f512c9cd09cb4245c424ab1632da0c24</id>
<content type='text'>
This provides an interface to get access to the base address
of PCI resources (MMIO, DOORBELL, etc.).  Only MMIO and
DOORBELL are implemented right now.  This is necessary to
properly utilize shared drivers on platform devices.  IP
modules can use this interface to get the base address
of the resource and add any additional offset and set the
size when setting up the platform driver(s).

Acked-by: Dave Airlie &lt;airlied@redhat.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: fix boolreturn.cocci warnings</title>
<updated>2015-12-21T21:42:34Z</updated>
<author>
<name>kbuild test robot</name>
<email>fengguang.wu@intel.com</email>
</author>
<published>2015-11-12T17:58:34Z</published>
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<id>urn:sha1:62a03f6d58dafd3d25f527e75589d45ba4b3a537</id>
<content type='text'>
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2653:9-10: WARNING: return of 0/1 in function 'is_pcie_gen2_supported' with return type bool
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2645:9-10: WARNING: return of 0/1 in function 'is_pcie_gen3_supported' with return type bool

 Return statements in functions returning bool should use
 true/false instead of 1/0.
Generated by: scripts/coccinelle/misc/boolreturn.cocci

CC: yanyang1 &lt;young.yang@amd.com&gt;
Signed-off-by: Fengguang Wu &lt;fengguang.wu@intel.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/cgs: add sys info query for pcie gen and link width</title>
<updated>2015-12-21T21:42:32Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-11-12T01:35:32Z</published>
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<id>urn:sha1:cfd316d59e203985699495147a973ba058ff5478</id>
<content type='text'>
Needed by powerplay to properly handle pcie dpm switching.

Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: extract pcie helpers to common header</title>
<updated>2015-12-21T21:42:30Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-11-12T01:18:52Z</published>
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<id>urn:sha1:16881da6c0b9db5fca95b96b0f02720e94c92629</id>
<content type='text'>
These will be used by multiple powerplay drivers and
other IP modules.

Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: add/update headers for Fiji SMU and DPM</title>
<updated>2015-12-21T21:42:15Z</updated>
<author>
<name>Eric Huang</name>
<email>JinHuiEric.Huang@amd.com</email>
</author>
<published>2015-11-09T22:34:31Z</published>
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<id>urn:sha1:770911a3cfbb43b67b5ea3189b624e4fe2cb27c1</id>
<content type='text'>
New headers for Fiji.

Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Signed-off-by: Eric Huang &lt;JinHuiEric.Huang@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h</title>
<updated>2015-12-21T21:42:12Z</updated>
<author>
<name>yanyang1</name>
<email>young.yang@amd.com</email>
</author>
<published>2015-08-17T06:15:20Z</published>
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<id>urn:sha1:3a287055aed6634d57d57da1977f1df3c9206945</id>
<content type='text'>
Add ixSWRST_COMMAND_1 in bif_5_0_d.h.  Required by
new powerplay code for tonga and fiji.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: yanyang1 &lt;young.yang@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new cgs interface to get display info (v2)</title>
<updated>2015-12-21T21:42:07Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2015-09-17T08:34:14Z</published>
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<id>urn:sha1:47bf18b5b257d5a385b7d447a29f97301f5b2282</id>
<content type='text'>
Add new CGS interfaces to query display info across modules.
This is nedded by the powerplay module for synchronizing with
the display module.

v2: (agd): fold in refresh rate fix, rebase

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement cgs interface to query system info</title>
<updated>2015-12-21T21:42:06Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2015-09-23T12:11:54Z</published>
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<id>urn:sha1:5e6186991a75ea192d7dd88b9d3f7e166eaae801</id>
<content type='text'>
Add a query to get the bus number and function of the
device.

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
</content>
</entry>
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