<feed xmlns='http://www.w3.org/2005/Atom'>
<title>pm24.git/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h, branch v5.16</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>https://git.kobert.dev/pm24.git/atom/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h?h=v5.16</id>
<link rel='self' href='https://git.kobert.dev/pm24.git/atom/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h?h=v5.16'/>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/'/>
<updated>2021-10-13T18:14:54Z</updated>
<entry>
<title>amdgpu/pm: (v2) add limit_type to (pptable_funcs)-&gt;set_power_limit signature</title>
<updated>2021-10-13T18:14:54Z</updated>
<author>
<name>Darren Powell</name>
<email>darren.powell@amd.com</email>
</author>
<published>2021-08-19T03:31:36Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=2d1ac1cbe57b306b244c43aa11610b89ea5a3178'/>
<id>urn:sha1:2d1ac1cbe57b306b244c43aa11610b89ea5a3178</id>
<content type='text'>
 v2
 add check for SMU_DEFAULT_PPT_LIMIT

 v1
 modify (pptable_funcs)-&gt;set_power_limit signature
 modify smu11 set_power_limit signature (arcturus, navi10, sienna_cichlid)
 modify smu13 set_power_limit signature (aldabaran)
 modify vangogh_set_power_limit signature (vangogh)

=== Test ===
sudo bash

AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_show_power_cap.log

cp $LOGFILE{,.old}
lspci -nn | grep "VGA\|Display" &gt; $LOGFILE
FILES="
power1_cap
power2_cap"

for f in $FILES
do
  if test -f "$HWMON_DIR/$f"; then
    echo === $f === &gt;&gt; $LOGFILE
    cat $HWMON_DIR/$f &gt;&gt; $LOGFILE
    RESTORE_VALUE=`cat $HWMON_DIR/$f` 2&gt;&amp;1  &gt;&gt; $LOGFILE
    echo RESTORE_VALUE $RESTORE_VALUE &gt;&gt; $LOGFILE
    echo 120000000 &gt; $HWMON_DIR/$f
    sleep 3
    cat $HWMON_DIR/$f &gt;&gt; $LOGFILE
    echo $RESTORE_VALUE &gt; $HWMON_DIR/$f
    sleep 3
    cat $HWMON_DIR/$f &gt;&gt; $LOGFILE
  else
    echo === $f === &gt;&gt; $LOGFILE
    echo File Not Found &gt;&gt; $LOGFILE
  fi
done
cat $LOGFILE

Signed-off-by: Darren Powell &lt;darren.powell@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: And destination bounds checking to struct copy</title>
<updated>2021-08-30T18:59:34Z</updated>
<author>
<name>Kees Cook</name>
<email>keescook@chromium.org</email>
</author>
<published>2021-08-27T03:16:47Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=4a9bd6db19be735f5f9d883ed15fb2b70ba36187'/>
<id>urn:sha1:4a9bd6db19be735f5f9d883ed15fb2b70ba36187</id>
<content type='text'>
In preparation for FORTIFY_SOURCE performing compile-time and run-time
field bounds checking for memcpy(), memmove(), and memset(), avoid
intentionally writing across neighboring fields.

The "Board Parameters" members of the structs:
	struct atom_smc_dpm_info_v4_5
	struct atom_smc_dpm_info_v4_6
	struct atom_smc_dpm_info_v4_7
	struct atom_smc_dpm_info_v4_10
are written to the corresponding members of the corresponding PPTable_t
variables, but they lack destination size bounds checking, which means
the compiler cannot verify at compile time that this is an intended and
safe memcpy().

Since the header files are effectively immutable[1] and a struct_group()
cannot be used, nor a common struct referenced by both sides of the
memcpy() arguments, add a new helper, amdgpu_memcpy_trailing(), to
perform the bounds checking at compile time. Replace the open-coded
memcpy()s with amdgpu_memcpy_trailing() which includes enough context
for the bounds checking.

"objdump -d" shows no object code changes.

[1] https://lore.kernel.org/lkml/e56aad3c-a06f-da07-f491-a894a570d78f@amd.com

Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: "Pan, Xinhui" &lt;Xinhui.Pan@amd.com&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Cc: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Cc: Likun Gao &lt;Likun.Gao@amd.com&gt;
Cc: Jiawei Gu &lt;Jiawei.Gu@amd.com&gt;
Cc: Evan Quan &lt;evan.quan@amd.com&gt;
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: drop the unnecessary intermediate percent-based transition</title>
<updated>2021-08-16T19:35:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-02-10T02:16:08Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=0d8318e11203c2d1ec54ae9a4aad71fb0ecf9c36'/>
<id>urn:sha1:0d8318e11203c2d1ec54ae9a4aad71fb0ecf9c36</id>
<content type='text'>
Currently, the readout of fan speed pwm is transited into percent-based
and then pwm-based. However, the transition into percent-based is totally
unnecessary and make the final output less accurate.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: correct the fan speed RPM retrieving</title>
<updated>2021-08-16T19:35:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-02-09T04:23:33Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=d9ca7567b864322b9fd13b0d29ed510b80bba2f0'/>
<id>urn:sha1:d9ca7567b864322b9fd13b0d29ed510b80bba2f0</id>
<content type='text'>
The relationship "PWM = RPM / smu-&gt;fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed RPM.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: record the RPM and PWM based fan speed settings</title>
<updated>2021-08-16T19:35:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-02-09T05:36:16Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=96401f7c21900ad03b67e49cc3b8e6aa7cccba74'/>
<id>urn:sha1:96401f7c21900ad03b67e49cc3b8e6aa7cccba74</id>
<content type='text'>
As the relationship "PWM = RPM / smu-&gt;fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, both the RPM and PWM
settings need to be saved.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: correct the fan speed RPM setting</title>
<updated>2021-08-16T19:35:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-02-09T05:20:30Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=f3289d049720f356dc35ae72289743d7202b7787'/>
<id>urn:sha1:f3289d049720f356dc35ae72289743d7202b7787</id>
<content type='text'>
The relationship "PWM = RPM / smu-&gt;fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
perform the fan speed RPM setting.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: restore user customized OD settings properly for NV1x</title>
<updated>2021-07-28T20:37:18Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-07-21T10:19:38Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=92cf050868c962bc712b5682b8a0ed04d3dfec3d'/>
<id>urn:sha1:92cf050868c962bc712b5682b8a0ed04d3dfec3d</id>
<content type='text'>
The customized OD settings can be divided into two parts: those
committed ones and non-committed ones.
  - For those changes which had been fed to SMU before S3/S4/Runpm
    suspend kicked, they are committed changes. They should be properly
    restored and fed to SMU on S3/S4/Runpm resume.
  - For those non-committed changes, they are restored only without feeding
    to SMU.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: message smu to update hbm bad page number</title>
<updated>2021-06-18T21:11:56Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2021-06-11T07:38:50Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=513befa63446cea8d399fd78761fc11ae518143d'/>
<id>urn:sha1:513befa63446cea8d399fd78761fc11ae518143d</id>
<content type='text'>
Use SMU to update the bad pages rather than directly
accessing the EEPROM from the driver.

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: correct the power limits reporting on OOB supported</title>
<updated>2021-06-11T20:03:09Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-05-19T04:22:04Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=488f211dab7d2fbd115b412848075c4c545e3471'/>
<id>urn:sha1:488f211dab7d2fbd115b412848075c4c545e3471</id>
<content type='text'>
As OOB(out-of-band) interface may be used to update the power limits.
Thus to make sure the power limits reporting of our driver always
reflects the correct values, the internal cache must be aligned
carefully.

V2: add support for out-of-band of other ASICs
    align cached current power limit with OOB imposed

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-By: Harish Kasiviswanathan &lt;Harish.Kasiviswanathan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: update the cached dpm feature status</title>
<updated>2021-06-11T20:02:30Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-12-07T07:50:08Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=1e75be2b674932b53ed1bdd7df35f89e47585388'/>
<id>urn:sha1:1e75be2b674932b53ed1bdd7df35f89e47585388</id>
<content type='text'>
For some ASICs, the real dpm feature disablement job is handled by
PMFW during baco reset and custom pptable loading. Cached dpm feature
status need to be updated to pair that.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
