<feed xmlns='http://www.w3.org/2005/Atom'>
<title>pm24.git/drivers/gpu/drm/amd/pm, branch cpufreq-rust</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>https://git.kobert.dev/pm24.git/atom/drivers/gpu/drm/amd/pm?h=cpufreq-rust</id>
<link rel='self' href='https://git.kobert.dev/pm24.git/atom/drivers/gpu/drm/amd/pm?h=cpufreq-rust'/>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/'/>
<updated>2025-01-28T21:23:06Z</updated>
<entry>
<title>drm/amd/pm: Mark MM activity as unsupported</title>
<updated>2025-01-28T21:23:06Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2025-01-22T03:42:41Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=819bf6662b93a5a8b0c396d2c7e7fab6264c9808'/>
<id>urn:sha1:819bf6662b93a5a8b0c396d2c7e7fab6264c9808</id>
<content type='text'>
Aldebaran doesn't support querying MM activity percentage. Keep the
field as 0xFFs to mark it as unsupported.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/pm: Fix smu v13.0.6 caps initialization</title>
<updated>2025-01-24T14:54:21Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2025-01-17T14:42:42Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=1bf06a1fcd7e06435e654e10f6a24784785854f7'/>
<id>urn:sha1:1bf06a1fcd7e06435e654e10f6a24784785854f7</id>
<content type='text'>
Fix the initialization and usage of SMU v13.0.6 capability values. Use
caps_set/clear functions to set/clear capability.

Also, fix SET_UCLK_MAX capability on APUs, it is supported on APUs.

Fixes: e9b86b841baf ("drm/amd/pm: Add capability flags for SMU v13.0.6")
Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: Refactor SMU 13.0.6 SDMA reset firmware version checks</title>
<updated>2025-01-24T14:54:17Z</updated>
<author>
<name>Jesse.zhang@amd.com</name>
<email>Jesse.zhang@amd.com</email>
</author>
<published>2025-01-18T09:38:22Z</published>
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<id>urn:sha1:875596b984c509a2ab3eba7ce054e5278171a701</id>
<content type='text'>
This patch refactors the firmware version checks in `smu_v13_0_6_reset_sdma`
to support multiple SMU programs with different firmware version thresholds.

V2: return -EOPNOTSUPP for unspported pmfw

Suggested-by: Lazar Lijo &lt;Lijo.Lazar@amd.com&gt;
Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>revert "drm/amdgpu/pm: add definition PPSMC_MSG_ResetSDMA2"</title>
<updated>2025-01-24T14:54:11Z</updated>
<author>
<name>Jesse.zhang@amd.com</name>
<email>Jesse.zhang@amd.com</email>
</author>
<published>2025-01-13T01:44:56Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=2e7618457c3871c8657ed1e8bc16e09a3aff39c2'/>
<id>urn:sha1:2e7618457c3871c8657ed1e8bc16e09a3aff39c2</id>
<content type='text'>
pmfw now unifies PPSMC_MSG_ResetSDMA definitions for different devices.
PPSMC_MSG_ResetSDMA2 is not needed.

Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>revert "drm/amdgpu/pm: Implement SDMA queue reset for different asic"</title>
<updated>2025-01-24T14:54:08Z</updated>
<author>
<name>Jesse.zhang@amd.com</name>
<email>jesse.zhang@amd.com</email>
</author>
<published>2025-01-18T09:05:25Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=941f0cb6c8609ea5bab095d5deb3fe367cc41c85'/>
<id>urn:sha1:941f0cb6c8609ea5bab095d5deb3fe367cc41c85</id>
<content type='text'>
pmfw unified PPSMC_MSG_ResetSDMA definitions for different devices.
PPSMC_MSG_ResetSDMA2 is not needed.

Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: Add capability flags for SMU v13.0.6</title>
<updated>2025-01-24T14:54:03Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2025-01-16T12:26:12Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=e9b86b841baf2e4e7e8b3521734aeb4803f22b99'/>
<id>urn:sha1:e9b86b841baf2e4e7e8b3521734aeb4803f22b99</id>
<content type='text'>
Add capability flags for SMU v13.0.6 variants. Initialize the flags
based on firmware support. As there are multiple IP versions maintained,
it is more manageable with one time initialization of caps flags based
on IP version and firmware feature support.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/smu13: update powersave optimizations</title>
<updated>2025-01-10T16:59:09Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-01-08T20:17:12Z</published>
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<id>urn:sha1:d477e39532d725b1cdb3c8005c689c74ffbf3b94</id>
<content type='text'>
Only apply when compute profile is selected.  This is
the only supported configuration.  Selecting other
profiles can lead to performane degradations.

Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/pm: Implement SDMA queue reset for different asic</title>
<updated>2025-01-09T21:02:28Z</updated>
<author>
<name>Jesse Zhang</name>
<email>jesse.zhang@amd.com</email>
</author>
<published>2024-12-16T09:20:52Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=da5c9677d267efdc3ead8440b638ece30dc93b16'/>
<id>urn:sha1:da5c9677d267efdc3ead8440b638ece30dc93b16</id>
<content type='text'>
Implement sdma queue reset by SMU_MSG_ResetSDMA2

Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Suggested-by: Tim Huang &lt;tim.huang@amd.com&gt;
Reviewed-by: Tim Huang &lt;tim.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/pm: add definition PPSMC_MSG_ResetSDMA2</title>
<updated>2025-01-09T21:02:09Z</updated>
<author>
<name>Jesse Zhang</name>
<email>jesse.zhang@amd.com</email>
</author>
<published>2024-12-16T08:53:49Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=c8fd3a74c72f3dc05d49850922dbce594875c444'/>
<id>urn:sha1:c8fd3a74c72f3dc05d49850922dbce594875c444</id>
<content type='text'>
add the PPSMC_MSG_ResetSDMA2 definition for smu 13.0.6

Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Tim Huang &lt;tim.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: Fill max mem bw &amp; total app clk counter</title>
<updated>2025-01-06T19:44:29Z</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2024-11-22T10:00:19Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=24a1b66752bb646f2905b6d952a712e61155c9ca'/>
<id>urn:sha1:24a1b66752bb646f2905b6d952a712e61155c9ca</id>
<content type='text'>
Fill max memory bandwidth and total app clock counter to metrics v1_7

v2: Remove unnecessary check

v3: Add app clock counter support for apu

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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