pm24.git/drivers/parport, branch rust-6.5

ata: parport_pc: add 16-bit and 8-bit fast EPP transfer flags

2023-03-23T03:22:19Z

PARPORT_EPP_FAST flag currently uses 32-bit I/O port access for data read/write (insl/outsl). Add PARPORT_EPP_FAST_16 and PARPORT_EPP_FAST_8 that use insw/outsw and insb/outsb (and PARPORT_EPP_FAST_32 as alias for PARPORT_EPP_FAST). Signed-off-by: Ondrej Zary Signed-off-by: Damien Le Moal

Merge tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

2023-02-24T20:47:33Z

Pull char/misc and other driver subsystem updates from Greg KH: "Here is the large set of driver changes for char/misc drivers and other smaller driver subsystems that flow through this git tree. Included in here are: - New IIO drivers and features and improvments in that subsystem - New hwtracing drivers and additions to that subsystem - lots of interconnect changes and new drivers as that subsystem seems under very active development recently. This required also merging in the icc subsystem changes through this tree. - FPGA driver updates - counter subsystem and driver updates - MHI driver updates - nvmem driver updates - documentation updates - Other smaller driver updates and fixes, full details in the shortlog All of these have been in linux-next for a while with no reported problems" * tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (223 commits) scripts/tags.sh: fix incompatibility with PCRE2 firmware: coreboot: Remove GOOGLE_COREBOOT_TABLE_ACPI/OF Kconfig entries mei: lower the log level for non-fatal failed messages mei: bus: disallow driver match while dismantling device misc: vmw_balloon: fix memory leak with using debugfs_lookup() nvmem: stm32: fix OPTEE dependency dt-bindings: nvmem: qfprom: add IPQ8074 compatible nvmem: qcom-spmi-sdam: register at device init time nvmem: rave-sp-eeprm: fix kernel-doc bad line warning nvmem: stm32: detect bsec pta presence for STM32MP15x nvmem: stm32: add OP-TEE support for STM32MP13x nvmem: core: use nvmem_add_one_cell() in nvmem_add_cells_from_of() nvmem: core: add nvmem_add_one_cell() nvmem: core: drop the removal of the cells in nvmem_add_cells() nvmem: core: move struct nvmem_cell_info to nvmem-provider.h nvmem: core: add an index parameter to the cell of: property: add #nvmem-cell-cells property of: property: make #.*-cells optional for simple props of: base: add of_parse_phandle_with_optional_args() net: add helper eth_addr_add() ...

parport_pc: Limit the number of PCI BAR pairs to 2

2023-01-20T12:12:00Z

Decrease the number of PCI BAR pair slots allocated for port subdrivers from 4 to 2 as none wants more than 2 at this time, reducing the memory footprint a little. No functional change. Signed-off-by: Maciej W. Rozycki Signed-off-by: Sudip Mukherjee Link: https://lore.kernel.org/r/20230108215656.6433-7-sudipm.mukherjee@gmail.com Signed-off-by: Greg Kroah-Hartman

parport_pc: Set up mode and ECR masks for Oxford Semiconductor devices

2023-01-20T12:12:00Z

No Oxford Semiconductor PCI or PCIe parallel port device supports the Parallel Port FIFO mode. All support the PS/2 Parallel Port mode and the Enhanced Parallel Port mode via the ECR register. The original 5V PCI OX16PCI954 device does not support the Extended Capabilities Port mode, the Test mode or the Configuration mode, but all the other OxSemi devices do, including in particular the 3.3V PCI OXmPCI954 device and the universal voltage PCI OXuPCI954 device. All the unsupported modes are marked reserved in the relevant datasheets. Accordingly enable the `base_hi' BAR for the 954 devices to enable PS2 and EPP mode support via the ECR register, however mask the COMPAT mode and, until we have a way to determine what chip variant it is that we poke at, also the ECP mode, and mask the COMPAT mode only for all the remaining OxSemi devices, fixing errors like: parport0: FIFO is stuck FIFO write timed out and a non-functional port when the Parallel Port FIFO mode is selected. Complementing the fix apply an ECR mask for all these devices, which are documented to only permit writing to the mode field of the ECR register with a bit pattern of 00001 required to be written to bits 4:0 on mode field writes. No nFault or service interrupts are implemented, which will therefore never have to be enabled, though bit 2 does report the FIFO threshold status to be polled for in the ECP mode where supported. We have a documented case of writing 1 to bit 2 causing a lock-up with at least one OX12PCI840 device (from old drivers/parport/ChangeLog): 2001-10-10 Tim Waugh * parport_pc.c: Support for OX12PCI840 PCI card (reported by mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we just don't trust its ECR). which commit adbd321a17cc ("parport_pc: add base_hi BAR for oxsemi_840") must have broken and by applying an ECR mask here we prevent the lock-up from triggering. This could have been the reason for requiring 00001 to be written to bits 4:0 of ECR. Update the inline comment accordingly; it has come from Linux 2.4.12 back in 2001 and predates the introduction of OXmPCI954 and OXuPCI954 devices that do support ECP. References: [1] "OX16PCI954 Integrated Quad UART and PCI interface", Oxford Semiconductor Ltd., Data Sheet Revision 1.3, Feb. 1999, Chapter 9 "Bidirectional Parallel Port", pp. 53-55 [2] "OX16PCI952 Data Sheet, Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface", Oxford Semiconductor Ltd., DS_B008A_00, Datasheet rev 1.1, June 2001, Chapter 8 "Bi-directional Parallel Port", pp. 52-56 [3] "OXmPCI954 DATA SHEET Integrated High Performance Quad UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford Semiconductor Ltd., DS-0019, June 2005, Chapter 10 "Bidirectional Parallel Port", pp. 86-90 [4] "OXmPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford Semiconductor Ltd., DS-0020, June 2005, Chapter 8 "Bidirectional Parallel Port", pp. 73-77 [5] "OX12PCI840 Integrated Parallel Port and PCI interface", Oxford Semiconductor Ltd., DS-0021, Jun 2005, Chapter 5 "Bi-directional Parallel Port", pp. 18-21 [6] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port", Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Chapter "Parallel Port Function", pp. 59-62 [7] "OXPCIe840 PCI Express Bridge to Parallel Port", Oxford Semiconductor, Inc., DS-0049, Mar 06 08, Chapter "Parallel Port Function", pp. 15-18 [8] "OXuPCI954 Data Sheet, Integrated High Performance Quad UARTs, 8-bit Local Bus/Parallel Port, 3.3 V and 5 V (Universal Voltage) PCI Interface.", Oxford Semiconductor, Inc., DS-0058, 26 Jan 2009, Chapter 8 "Bidirectional Parallel Port", pp. 62-65 [9] "OXuPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port, 3.3 V and 5.0 V Universal Voltage PCI Interface.", Oxford Semiconductor, Inc., DS-0059, Sep 2007, Chapter 8 "Bidirectional Parallel Port", pp. 61-64 Signed-off-by: Maciej W. Rozycki Signed-off-by: Sudip Mukherjee Link: https://lore.kernel.org/r/20230108215656.6433-6-sudipm.mukherjee@gmail.com Signed-off-by: Greg Kroah-Hartman

parport_pc: Add an ECR mask field for PCI devices

2023-01-20T12:12:00Z

Add a bitmask field specifying writable ECR bits for PCI devices and apply it via `__parport_pc_probe_port'. Signed-off-by: Maciej W. Rozycki Signed-off-by: Sudip Mukherjee Link: https://lore.kernel.org/r/20230108215656.6433-5-sudipm.mukherjee@gmail.com Signed-off-by: Greg Kroah-Hartman

parport_pc: Add a mode mask field for PCI devices

2023-01-20T12:12:00Z

Add a mode mask field for PCI devices and use `__parport_pc_probe_port' in place of `parport_pc_probe_port' to apply it. Signed-off-by: Maciej W. Rozycki Signed-off-by: Sudip Mukherjee Link: https://lore.kernel.org/r/20230108215656.6433-4-sudipm.mukherjee@gmail.com Signed-off-by: Greg Kroah-Hartman

parport_pc: Let chipset drivers mask ECR bits on writes

2023-01-20T12:12:00Z

Provide an `ecr_writable' parameter to `__parport_pc_probe_port' so that callers can specify a mask of bits to modify on ECR writes. To avoid the need for separate bit set and bit clear masks always set bit 0 whenever a non-zero mask has been set, as all the currently known cases where a mask is required, that is Oxford Semiconductor devices, do require this bit to be set. If further cases are discovered where the bit is required to be clear, we can update code accordingly, but chances are very low as the bit is supposed to be read-only[1]. Skip ECR probing, which can be problematic as the Oxford Semiconductor OX12PCI840 part has been reported to lock up on setting bit 2, whenever a non-zero mask has been requested by a port subdriver, assuming that the ECR must be there if the subdriver has requested a specific way to access it. References: [1] "Extended Capabilities Port Protocol and ISA Interface Standard", Microsoft Corporation, Revision: 1.14, July 14, 1993, Table 14 "Extended Control Register" Signed-off-by: Maciej W. Rozycki Signed-off-by: Sudip Mukherjee Link: https://lore.kernel.org/r/20230108215656.6433-3-sudipm.mukherjee@gmail.com Signed-off-by: Greg Kroah-Hartman

parport_pc: Let chipset drivers mask unsupported modes

2023-01-20T12:12:00Z

Rename `parport_pc_probe_port' to `__parport_pc_probe_port' and add a `mode_mask' parameter so that callers can specify a mask of unsupported modes to exclude even if mode probing seems to indicate otherwise. Add a `parport_pc_probe_port' wrapper with an implicit mask of 0 for the current callers to use. No functional change at this point, but the configuration of data write handlers is now no longer intertwined with determination and reporting of available modes. Signed-off-by: Maciej W. Rozycki Signed-off-by: Sudip Mukherjee Link: https://lore.kernel.org/r/20230108215656.6433-2-sudipm.mukherjee@gmail.com Signed-off-by: Greg Kroah-Hartman

parport_pc: Remove stale `parport_pc_ecp_read_block_pio' reference

2023-01-20T12:12:00Z

Complement commit 991214386dee ("parport: remove unused dead code from lowlevel drivers") and remove a stale piece of commented-out code that refers to a function removed with said commit. Signed-off-by: Maciej W. Rozycki Signed-off-by: Sudip Mukherjee Link: https://lore.kernel.org/r/20230108215656.6433-1-sudipm.mukherjee@gmail.com Signed-off-by: Greg Kroah-Hartman

parport: remove ax88796 driver

2023-01-16T08:26:06Z

The s3c24xx bast platform was removed, so this driver has no users any more and can be removed as well. Acked-by: Sudip Mukherjee Signed-off-by: Arnd Bergmann