pm24.git/drivers/pinctrl/qcom/Makefile, branch master

pinctrl: qcom: Add sm8750 pinctrl driver

2024-11-13T13:45:58Z

Add TLMM pinctrl driver to support pin configuration with pinctrl framework for sm8750 SoC. Signed-off-by: Melody Olvera Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/20241112002843.2804490-3-quic_molvera@quicinc.com Signed-off-by: Linus Walleij

pinctrl: qcom: add support for TLMM on SAR2130P

2024-10-22T12:43:45Z

Add driver for the pincontrol device as present on the Qualcomm SAR2130P platform. This is based on the msm-5.10 tree, tag KERNEL.PLATFORM.1.0.r4-00400-NEO.0. Co-developed-by: Mayank Grover Signed-off-by: Mayank Grover Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/20241018-sar2130p-tlmm-v2-2-11a1d09a6e5f@linaro.org Signed-off-by: Linus Walleij

pinctrl: qcom: add the tlmm driver for QCS8300 platforms

2024-10-22T12:41:44Z

Add support for QCS8300 TLMM configuration and control via the pinctrl framework. Signed-off-by: Jingyi Wang Link: https://lore.kernel.org/20241018-qcs8300_tlmm-v3-2-8b8d3957cf1a@quicinc.com Signed-off-by: Linus Walleij

pinctrl: qcom: add the tlmm driver for QCS615 platform

2024-10-01T14:20:16Z

Add support for QCS615 TLMM configuration and control via the pinctrl framework. Signed-off-by: Lijuan Gao Link: https://lore.kernel.org/20240920-add_qcs615_pinctrl_driver-v2-2-e03c42a9d055@quicinc.com Signed-off-by: Linus Walleij

pinctrl: qcom: Introduce IPQ5424 TLMM driver

2024-10-01T12:19:11Z

The IPQ5424 SoC comes with a TLMM block, like all other Qualcomm platforms, so add a driver for it. Co-developed-by: Varadarajan Narayanan Signed-off-by: Varadarajan Narayanan Signed-off-by: Sricharan Ramabadhran Link: https://lore.kernel.org/20240927065244.3024604-6-quic_srichara@quicinc.com Signed-off-by: Linus Walleij

pinctrl: qcom: Introduce SM4250 LPI pinctrl driver

2024-06-26T10:41:07Z

Add support for the pin controller block on SM4250 Low Power Island. Signed-off-by: Srinivas Kandagatla Reviewed-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/20240612-sm4250-lpi-v4-2-a0342e47e21b@linaro.org Signed-off-by: Linus Walleij

pinctrl: qcom: sm4450: dd SM4450 pinctrl driver

2023-12-20T11:03:03Z

Add pinctrl driver for TLMM block found in SM4450 SoC. Can Guo helped out in reviewing the driver. Reviewed-by: Bjorn Andersson Signed-off-by: Tengfei Fan Link: https://lore.kernel.org/r/20231212094900.12615-3-quic_tengfan@quicinc.com Signed-off-by: Linus Walleij

pinctrl: qcom: Add X1E80100 pinctrl driver

2023-11-24T10:22:12Z

Add initial pinctrl driver to support pin configuration with pinctrl framework for X1E80100 SoC. Co-developed-by: Abel Vesa Signed-off-by: Abel Vesa Signed-off-by: Rajendra Nayak Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Reviewed-by: Bjorn Andersson Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231117093921.31968-3-quic_sibis@quicinc.com Signed-off-by: Linus Walleij

pinctrl: qcom: Introduce the SM8650 Top Level Mode Multiplexer driver

2023-11-13T14:05:13Z

Add Top Level Mode Multiplexer (pinctrl) support for the SM8650 platform. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-3-0e179c368933@linaro.org Signed-off-by: Linus Walleij

pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS

2023-11-13T13:58:02Z

Add driver for the pin controller in Low Power Audio SubSystem (LPASS) of Qualcomm SM8650 SoC. Notable differences against SM8550 LPASS pin controller: 1. Additional address space for slew rate thus driver uses LPI_FLAG_SLEW_RATE_SAME_REG and sets slew rate via different register. 2. Two new pin mux functions: qca_swr_clk and qca_swr_data Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20231027093615.140656-3-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij