pm24.git/drivers/pinctrl, branch v5.12-rc2

Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

2021-02-26T18:28:35Z

Pull RISC-V updates from Palmer Dabbelt: "A handful of new RISC-V related patches for this merge window: - A check to ensure drivers are properly using uaccess. This isn't manifesting with any of the drivers I'm currently using, but may catch errors in new drivers. - Some preliminary support for the FU740, along with the HiFive Unleashed it will appear on. - NUMA support for RISC-V, which involves making the arm64 code generic. - Support for kasan on the vmalloc region. - A handful of new drivers for the Kendryte K210, along with the DT plumbing required to boot on a handful of K210-based boards. - Support for allocating ASIDs. - Preliminary support for kernels larger than 128MiB. - Various other improvements to our KASAN support, including the utilization of huge pages when allocating the KASAN regions. We may have already found a bug with the KASAN_VMALLOC code, but it's passing my tests. There's a fix in the works, but that will probably miss the merge window. * tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (75 commits) riscv: Improve kasan population by using hugepages when possible riscv: Improve kasan population function riscv: Use KASAN_SHADOW_INIT define for kasan memory initialization riscv: Improve kasan definitions riscv: Get rid of MAX_EARLY_MAPPING_SIZE soc: canaan: Sort the Makefile alphabetically riscv: Disable KSAN_SANITIZE for vDSO riscv: Remove unnecessary declaration riscv: Add Canaan Kendryte K210 SD card defconfig riscv: Update Canaan Kendryte K210 defconfig riscv: Add Kendryte KD233 board device tree riscv: Add SiPeed MAIXDUINO board device tree riscv: Add SiPeed MAIX GO board device tree riscv: Add SiPeed MAIX DOCK board device tree riscv: Add SiPeed MAIX BiT board device tree riscv: Update Canaan Kendryte K210 device tree dt-bindings: add resets property to dw-apb-timer dt-bindings: fix sifive gpio properties dt-bindings: update sifive uart compatible string dt-bindings: update sifive clint compatible string ...

Merge tag 'pinctrl-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2021-02-23T02:39:11Z

Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.12 kernel. This time a calm set with no core changes. New drivers/subdrivers: - Renesas R8A7790A0 pin controller. - Allwinner H616 and H616-R pin controllers. - Qualcomm SM8350 and SC8180x pin controllers. Improvements: - Redo the DT bindings for Ralink RT2880. - A common Qualcomm TLMM DT binding in YAML. - Delete the unused drivers for U300, COH901, Sirf Atlas, and ZTE ZX" * tag 'pinctrl-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (71 commits) pinctrl: mediatek: Fix trigger type setting follow for unexpected interrupt dt-bindings: pinctrl: Group tuples in pin control properties pinctrl: nuvoton: npcm7xx: Fix alignment of table header comment pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'" pinctrl: at91-pio4: add support for slew-rate dt-bindings: pinctrl: at91-pio4: add slew-rate pinctrl: actions: Add depends on || COMPILE_TEST pinctrl: single: set function name when adding function pinctrl: qcom: Add sc8180x TLMM driver dt-bindings: pinctrl: qcom: Add sc8180x binding dt-bindings: pinctrl: qcom: Define common TLMM binding pinctrl: qcom: Add SM8350 pinctrl driver dt-bindings: pinctrl: qcom: Add SM8350 pinctrl bindings pinctrl: samsung: use raw_spinlock for s3c64xx dt-bindings: mediatek: mt8192: Fix dt_binding_check warning pinctrl: qcom: spmi-mpp: Add PM8019 compatible pinctrl: pinmux: add function selector to pinmux-functions pinctrl: samsung: use raw_spinlock for locking pinctrl: clarify #pinctrl-cells for pinctrl-single,pins pinctrl: actions: Add the platform dependency to drivers ...

pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver

2021-02-19T07:18:01Z

Add the pinctrl-k210.c pinctrl driver for the Canaan Kendryte K210 field programmable IO array (FPIOA) to allow configuring the SoC pin functions. The K210 has 48 programmable pins which can take any of 256 possible functions. This patch is inspired from the k210 pinctrl driver for the u-boot project and contains many direct contributions from Sean Anderson. The MAINTAINERS file is updated, adding the entry "CANAAN/KENDRYTE K210 SOC FPIOA DRIVER" with myself listed as maintainer for this driver. Cc: Linus Walleij Cc: linux-gpio@vger.kernel.org Signed-off-by: Sean Anderson Signed-off-by: Damien Le Moal Reviewed-by: Linus Walleij Signed-off-by: Palmer Dabbelt

gpio: visconti: Add Toshiba Visconti GPIO support

2021-02-15T10:43:26Z

Add the GPIO driver for Toshiba Visconti ARM SoCs. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Punit Agrawal Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski

pinctrl: mediatek: Fix trigger type setting follow for unexpected interrupt

2021-02-15T04:52:01Z

When flipping the polarity will be generated interrupt under certain circumstances, but GPIO external signal has not changed. Then, mask the interrupt before polarity setting, and clear the unexpected interrupt after trigger type setting completed. Remove mtk_eint_flip_edge: because mtk_eint_unmask already calls it. Signed-off-by: Hailong Fan Reviewed-by: Nicolas Boichat Link: https://lore.kernel.org/r/20210125041753.2214-1-hailong.fan@mediatek.com Signed-off-by: Linus Walleij

pinctrl: nuvoton: npcm7xx: Fix alignment of table header comment

2021-02-12T12:44:36Z

Make it so that each column label is in the column that it is supposed to refer to. Signed-off-by: Jonathan Neuschäfer Link: https://lore.kernel.org/r/20210130162954.918803-1-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij

pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'"

2021-02-12T12:44:36Z

Fix "Prefer 'unsigned int' to bare use of 'unsigned'" checkpatch.pl warning. Signed-off-by: Claudiu Beznea Acked-by: Ludovic Desroches Link: https://lore.kernel.org/r/1611747945-29960-4-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Linus Walleij

pinctrl: at91-pio4: add support for slew-rate

2021-02-12T12:44:36Z

SAMA7G5 supports slew rate configuration. Adapt the driver for this. For output switching frequencies lower than 50MHz the slew rate needs to be enabled. Since most of the pins on SAMA7G5 fall into this category enabled the slew rate by default. Signed-off-by: Claudiu Beznea Acked-by: Ludovic Desroches Link: https://lore.kernel.org/r/1611747945-29960-3-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Linus Walleij

pinctrl: actions: Add depends on || COMPILE_TEST

2021-02-12T12:44:26Z

I happened to apply the v1 of the patch restriction the selection to ARM or ARM64, sorry for my sloppiness. Fixing up the mistake as I can't back the patch out now. Fixes: 5784921f7b6c ("pinctrl: actions: Add the platform dependency to drivers") Reviewed-by: Manivannan Sadhasivam Signed-off-by: Linus Walleij

pinctrl: single: set function name when adding function

2021-02-12T12:44:26Z

pcs_add_function() fails to set the function name in struct pcs_function when adding a new function. As a result this line in pcs_set_mux(): dev_dbg(pcs->dev, "enabling %s function%i\n", func->name, fselector); prints "(null)" for the function: pinctrl-single 44e10800.pinmux: enabling (null) function0 pinctrl-single 44e10800.pinmux: enabling (null) function1 pinctrl-single 44e10800.pinmux: enabling (null) function2 pinctrl-single 44e10800.pinmux: enabling (null) function3 With this fix, the output is now: pinctrl-single 44e10800.pinmux: enabling pinmux-uart0-pins function0 pinctrl-single 44e10800.pinmux: enabling pinmux-mmc0-pins function1 pinctrl-single 44e10800.pinmux: enabling pinmux-i2c0-pins function2 pinctrl-single 44e10800.pinmux: enabling pinmux-mmc0-pins function3 Cc: Jason Kridner Cc: Robert Nelson Cc: Linus Walleij Cc: Tony Lindgren Signed-off-by: Drew Fustini Acked-by: Tony Lindgren Link: https://lore.kernel.org/r/20210125203542.51513-1-drew@beagleboard.org Signed-off-by: Linus Walleij