pm24.git/drivers/soc/qcom, branch cpufreq-rust

genirq: Remove leading space from irq_chip::irq_print_chip() callbacks

2025-02-07T07:56:01Z

The space separator was factored out from the multiple chip name prints, but several irq_chip::irq_print_chip() callbacks still print a leading space. Remove the superfluous double spaces. Fixes: 9d9f204bdf7243bf ("genirq/proc: Add missing space separator back") Signed-off-by: Geert Uytterhoeven Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/all/893f7e9646d8933cd6786d5a1ef3eb076d263768.1738764803.git.geert+renesas@glider.be

soc: qcom: pd_mapper: Add SM7225 compatible

2025-01-08T22:40:35Z

The Qualcomm SM7225 is practically identical to SM6350, so add an entry using that data. Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20241220-pd-mapper-sm7225-v1-1-68f85a87288d@fairphone.com Signed-off-by: Bjorn Andersson

soc: qcom: llcc: Update configuration data for IPQ5424

2025-01-08T02:16:21Z

The 'broadcast' register space is present only in chipsets that have multiple instances of LLCC IP. Since IPQ5424 has only one instance, both the LLCC and LLCC_BROADCAST points to the same register space. Signed-off-by: Varadarajan Narayanan Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20241121051935.1055222-3-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson

soc: qcom: socinfo: add QCS9075 SoC ID

2025-01-06T23:59:34Z

Update soc_id table for the Qualcomm QCS9075 SoC to represent qcs9075 machine. Reviewed-by: Dmitry Baryshkov Signed-off-by: Wasim Nazir Link: https://lore.kernel.org/r/20241229152332.3068172-3-quic_wasimn@quicinc.com Signed-off-by: Bjorn Andersson

soc: qcom: socinfo: Avoid out of bounds read of serial number

2025-01-06T23:49:44Z

On MSM8916 devices, the serial number exposed in sysfs is constant and does not change across individual devices. It's always: db410c:/sys/devices/soc0$ cat serial_number 2644893864 The firmware used on MSM8916 exposes SOCINFO_VERSION(0, 8), which does not have support for the serial_num field in the socinfo struct. There is an existing check to avoid exposing the serial number in that case, but it's not correct: When checking the item_size returned by SMEM, we need to make sure the *end* of the serial_num is within bounds, instead of comparing with the *start* offset. The serial_number currently exposed on MSM8916 devices is just an out of bounds read of whatever comes after the socinfo struct in SMEM. Fix this by changing offsetof() to offsetofend(), so that the size of the field is also taken into account. Cc: stable@vger.kernel.org Fixes: efb448d0a3fc ("soc: qcom: Add socinfo driver") Signed-off-by: Stephan Gerhold Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20241230-qcom-socinfo-serialno-oob-v1-1-9b7a890da3da@linaro.org Signed-off-by: Bjorn Andersson

soc: qcom: rmtfs: constify rmtfs_class

2024-12-26T21:18:03Z

The rmtfs class object is never modified and can be made constant. Reviewed-by: Dmitry Baryshkov Signed-off-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20241202094903.18388-2-brgl@bgdev.pl Signed-off-by: Bjorn Andersson

soc: qcom: rmtfs: allow building the module with COMPILE_TEST=y

2024-12-26T21:18:03Z

Make it possible to build the module when COMPILE_TEST is enabled for better build coverage. Reviewed-by: Dmitry Baryshkov Signed-off-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20241202094903.18388-1-brgl@bgdev.pl Signed-off-by: Bjorn Andersson

soc: qcom: pmic_glink_altmode: simplify locking with guard()

2024-12-26T19:00:07Z

Simplify error handling (less gotos) over locks with guard(). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240822164853.231087-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson

soc: qcom: smem_state: fix missing of_node_put in error path

2024-12-26T04:14:01Z

If of_parse_phandle_with_args() succeeds, the OF node reference should be dropped, regardless of number of phandle arguments. Cc: stable@vger.kernel.org Fixes: 9460ae2ff308 ("soc: qcom: Introduce common SMEM state machine code") Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240822164853.231087-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson

soc: qcom: llcc: Enable LLCC_WRCACHE at boot on X1

2024-12-26T03:59:50Z

The Last Level Cache is split into many slices, each one of which can be toggled on or off. Only certain slices are recommended to be turned on unconditionally, in order to reach optimal performance/latency/power levels. Enable WRCACHE on X1 at boot, in accordance with internal recommendations. No significant performance difference is expected. Fixes: b3cf69a43502 ("soc: qcom: llcc: Add configuration data for X1E80100") Cc: stable@vger.kernel.org Reviewed-by: Rajendra Nayak Signed-off-by: Konrad Dybcio Reviewed-by: Johan Hovold Tested-by: Johan Hovold Link: https://lore.kernel.org/r/20241219-topic-llcc_x1e_wrcache-v3-1-b9848d9c3d63@oss.qualcomm.com Signed-off-by: Bjorn Andersson