<feed xmlns='http://www.w3.org/2005/Atom'>
<title>pm24.git/include/linux/bcma, branch v4.7-rc5</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<id>https://git.kobert.dev/pm24.git/atom?h=v4.7-rc5</id>
<link rel='self' href='https://git.kobert.dev/pm24.git/atom?h=v4.7-rc5'/>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/'/>
<updated>2016-05-24T18:00:20Z</updated>
<entry>
<title>Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd</title>
<updated>2016-05-24T18:00:20Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-05-24T18:00:20Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=8bc4d5f394a3facbad6af2f18940f1db3b1a0844'/>
<id>urn:sha1:8bc4d5f394a3facbad6af2f18940f1db3b1a0844</id>
<content type='text'>
Pull MTD updates from Brian Norris:
 "First cycle with Boris as NAND maintainer! Many (most) bullets stolen
  from him.

  Generic:
   - Migrated NAND LED trigger to be a generic MTD trigger

  NAND:
   - Introduction of the "ECC algorithm" concept, to avoid overloading
     the ECC mode field too much more
   - Replaced the nand_ecclayout infrastructure with something a little
     more flexible (finally!) and future proof
   - Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some
     of this into their own tree as well
   - Prepare the sunxi NAND driver to receive DMA support
   - Handle bitflips in erased pages on GPMI revisions that do not
     support this in hardware.

  SPI NOR:
   - Start using the spi_flash_read() API for SPI drivers that support
     it (i.e., SPI drivers with special memory-mapped flash modes)

  And other small scattered improvments"

* tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits)
  mtd: spi-nor: support GigaDevice gd25lq64c
  mtd: nand_bch: fix spelling of "probably"
  mtd: brcmnand: respect ECC algorithm set by NAND subsystem
  gpmi-nand: Handle ECC Errors in erased pages
  Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value
  mtd: nand: add support for "nand-ecc-algo" DT property
  mtd: mtd: drop NAND_ECC_SOFT_BCH enum value
  mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping
  mtd: nand: read ECC algorithm from the new field
  mtd: nand: fsmc: validate ECC setup by checking algorithm directly
  mtd: nand: set ECC algorithm to Hamming on fallback
  staging: mt29f_spinand: set ECC algorithm explicitly
  CRIS v32: nand: set ECC algorithm explicitly
  mtd: nand: atmel: set ECC algorithm explicitly
  mtd: nand: davinci: set ECC algorithm explicitly
  mtd: nand: bf5xx: set ECC algorithm explicitly
  mtd: nand: omap2: Fix high memory dma prefetch transfer
  mtd: nand: omap2: Start dma request before enabling prefetch
  mtd: nandsim: add __init attribute
  mtd: nand: move of_get_nand_xxx() helpers into nand_base.c
  ...
</content>
</entry>
<entry>
<title>phy: bcm-ns-usb2: new driver for USB 2.0 PHY on Northstar</title>
<updated>2016-04-30T14:42:28Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-04-14T09:37:43Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=d3feb406733544dbf0e239ef945a09decdceac88'/>
<id>urn:sha1:d3feb406733544dbf0e239ef945a09decdceac88</id>
<content type='text'>
Northstar is a family of SoCs used in home routers. They have USB 2.0
and 3.0 controllers with PHYs that need to be properly initialized.
This driver provides PHY init support in a generic way and can be bound
with an EHCI controller driver.
There are (just a few) registers being defined in bcma header. It's
because DMU/CRU registers will be also needed in other drivers. We will
need them e.g. in PCIe controller/PHY driver and at some point probably
in clock driver for BCM53573 chipset. By using include/linux/bcma/ we
avoid code duplication.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>mtd: bcm47xxsflash: use ioremap_cache() instead of KSEG0ADDR()</title>
<updated>2016-04-04T07:07:57Z</updated>
<author>
<name>Brian Norris</name>
<email>computersforpeace@gmail.com</email>
</author>
<published>2016-02-26T10:50:28Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=5651d6aaf489d1db48c253cf884b40214e91c2c5'/>
<id>urn:sha1:5651d6aaf489d1db48c253cf884b40214e91c2c5</id>
<content type='text'>
Using KSEG0ADDR makes code highly MIPS dependent and not portable.
Thanks to the fix a68f376 ("MIPS: io.h: Define `ioremap_cache'") we can
use ioremap_cache which is generic and supported on MIPS as well now.

KSEG0ADDR was translating 0x1c000000 into 0x9c000000. With ioremap_cache
we use MIPS's __ioremap (and then remap_area_pages). This results in
different address (e.g. 0xc0080000) but it still should be cached as
expected and it was successfully tested with BCM47186B0.

Other than that drivers/bcma/driver_chipcommon_sflash.c nicely setups a
struct resource for access window, but we wren't using it. Use it now
and drop duplicated info.

Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
</content>
</entry>
<entry>
<title>bcma: move parallel flash support to separated file</title>
<updated>2016-03-07T12:41:08Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-02-12T09:15:44Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=d6a3b51ada68c2bd3e184f4729ce626a1721cf74'/>
<id>urn:sha1:d6a3b51ada68c2bd3e184f4729ce626a1721cf74</id>
<content type='text'>
This follows the way of handling other flashes and cleans code a bit. As
next task we will want to move flash code to ChipCommon driver as:
1) Flash controllers are accesible using ChipCommon registers
2) This code isn't MIPS specific
This change prepares bcma for that.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>bcma: drop unneeded fields from bcma_pflash struct</title>
<updated>2016-03-07T12:41:08Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-02-12T09:15:43Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=2e62f9b2a41e4ade1a0bb3c1bbda4defe4c67243'/>
<id>urn:sha1:2e62f9b2a41e4ade1a0bb3c1bbda4defe4c67243</id>
<content type='text'>
Most of info stored in this struct wasn't really used anywhere as we put
all that data in platform data &amp; resource as well.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>bcma: add support for BCM47094</title>
<updated>2016-02-06T11:46:59Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-01-24T15:37:33Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=61dba73cdbba8ec5c01b31beaf9e2debc2d2f273'/>
<id>urn:sha1:61dba73cdbba8ec5c01b31beaf9e2debc2d2f273</id>
<content type='text'>
It's another SoC with 32 GPIOs and simplified watchdog handling. It was
tested on D-Link DIR-885L.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>bcma: support PMU present as separated bus core</title>
<updated>2016-02-06T11:36:11Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-01-19T07:45:26Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=b3c47afbf54d86daa0473895e8ca9e8b663f5c1a'/>
<id>urn:sha1:b3c47afbf54d86daa0473895e8ca9e8b663f5c1a</id>
<content type='text'>
On recent Broadcom chipsets PMU is present as separated core and it
can't be accessed using ChipCommon anymore as it fails with e.g.:
[    0.000577] Unhandled fault: external abort on non-linefetch (0x1008) at 0xf1000604

Solve it by using a new (PMU) core pointer set to ChipCommon or PMU
depending on the hardware capabilities.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>bcma: use _PMU_ in all names of PMU registers</title>
<updated>2016-02-06T11:36:11Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-01-19T07:45:25Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=67edf354faaf93156646e741483b2313bc756c0f'/>
<id>urn:sha1:67edf354faaf93156646e741483b2313bc756c0f</id>
<content type='text'>
PMU (Power Management Unit) seems to be a separated piece of hardware,
just accessed using ChipCommon core registers. In recent Broadcom
chipsets PMU is not bounded to CC but available as separated core.

To make code cleaner &amp; easier to review (for a correct R/W access) use
clearer names.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>bcma: identify bus cores (devices) found on BCM47189</title>
<updated>2016-02-06T11:34:50Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-01-15T23:48:52Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=7267bcda332e2782e21a559f3b1b859a35b4062d'/>
<id>urn:sha1:7267bcda332e2782e21a559f3b1b859a35b4062d</id>
<content type='text'>
Add missing defines and print proper names.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>mtd: bcm47xxnflash: really unregister NAND on device removal</title>
<updated>2015-12-14T18:11:09Z</updated>
<author>
<name>Brian Norris</name>
<email>computersforpeace@gmail.com</email>
</author>
<published>2015-12-09T01:04:59Z</published>
<link rel='alternate' type='text/html' href='https://git.kobert.dev/pm24.git/commit/?id=665d2c2848f14c0c2a2e89192bde9073c4d352f7'/>
<id>urn:sha1:665d2c2848f14c0c2a2e89192bde9073c4d352f7</id>
<content type='text'>
The field bcma_nflash::mtd is never set to be non-zero anywhere, but we
test for it in the removal path. So the MTD is never unregistered.

Also, we should use nand_release(), not mtd_device_unregister().

Finally, we don't need to use the 'platdata' for stashing/retrieving our
*driver* data -- that's what *_{get,set}_drvdata() are for.

So, kill off bcm_nflash::mtd, and stash the struct bcm47xxnflash in
drvdata instead. Also move the forward declaration of mtd_info up a bit,
since struct bcma_sflash should be using it.

Caught while inspecting other changes being made to this driver. Compile
tested only.

Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Cc: "Rafał Miłecki" &lt;zajec5@gmail.com&gt;
Cc: linux-wireless@vger.kernel.org
Acked-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
</feed>
