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<title>pm24.git/include/linux/stmmac.h, branch v5.2-rc2</title>
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<updated>2019-01-31T06:24:49Z</updated>
<entry>
<title>net: stmmac: Fallback to Platform Data clock in Watchdog conversion</title>
<updated>2019-01-31T06:24:49Z</updated>
<author>
<name>Jose Abreu</name>
<email>jose.abreu@synopsys.com</email>
</author>
<published>2019-01-30T14:54:19Z</published>
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<id>urn:sha1:4ec5302fa906ec9d86597b236f62315bacdb9622</id>
<content type='text'>
If we don't have DT then stmmac_clk will not be available. Let's add a
new Platform Data field so that we can specify the refclk by this mean.

This way we can still use the coalesce command in PCI based setups.

Signed-off-by: Jose Abreu &lt;joabreu@synopsys.com&gt;
Cc: Joao Pinto &lt;jpinto@synopsys.com&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@st.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: Rework coalesce timer and fix multi-queue races</title>
<updated>2018-09-19T02:48:08Z</updated>
<author>
<name>Jose Abreu</name>
<email>Jose.Abreu@synopsys.com</email>
</author>
<published>2018-09-17T08:22:56Z</published>
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<id>urn:sha1:8fce3331702316d4bcfeb0771c09ac75d2192bbc</id>
<content type='text'>
This follows David Miller advice and tries to fix coalesce timer in
multi-queue scenarios.

We are now using per-queue coalesce values and per-queue TX timer.

Coalesce timer default values was changed to 1ms and the coalesce frames
to 25.

Tested in B2B setup between XGMAC2 and GMAC5.

Signed-off-by: Jose Abreu &lt;joabreu@synopsys.com&gt;
Fixes: 	ce736788e8a ("net: stmmac: adding multiple buffers for TX")
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Cc: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Cc: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Joao Pinto &lt;jpinto@synopsys.com&gt;
Cc: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@st.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: Add XGMAC 2.10 HWIF entry</title>
<updated>2018-08-09T18:16:28Z</updated>
<author>
<name>Jose Abreu</name>
<email>Jose.Abreu@synopsys.com</email>
</author>
<published>2018-08-08T08:04:29Z</published>
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<id>urn:sha1:48ae5554a076c1bca31448d60263e4038def9f6f</id>
<content type='text'>
Add a new entry to HWIF table for XGMAC 2.10. For now we fill it with
empty callbacks which will be added in posterior patches.

Signed-off-by: Jose Abreu &lt;joabreu@synopsys.com&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Joao Pinto &lt;jpinto@synopsys.com&gt;
Cc: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@st.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>stmmac: use of_property_read_u32 instead of read_u8</title>
<updated>2017-11-03T05:15:06Z</updated>
<author>
<name>Bhadram Varka</name>
<email>vbhadram@nvidia.com</email>
</author>
<published>2017-11-02T07:22:13Z</published>
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<id>urn:sha1:e73b49ebd9deeb0ff2cd9ac6fd9c72a433d1e062</id>
<content type='text'>
Numbers in DT are stored in “cells” which are 32-bits
in size. of_property_read_u8 does not work properly
because of endianness problem.

This causes it to always return 0 with little-endian
architectures.

Fix it by using of_property_read_u32() OF API.

Signed-off-by: Bhadram Varka &lt;vbhadram@nvidia.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net-next: stmmac: Add dwmac-sun8i</title>
<updated>2017-06-01T18:53:04Z</updated>
<author>
<name>LABBE Corentin</name>
<email>clabbe.montjoie@gmail.com</email>
</author>
<published>2017-05-31T07:18:36Z</published>
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<id>urn:sha1:9f93ac8d4085f718d3c7c5fedcb98dbdd2287648</id>
<content type='text'>
The dwmac-sun8i is a heavy hacked version of stmmac hardware by
allwinner.
In fact the only common part is the descriptor management and the first
register function.

Signed-off-by: Corentin Labbe &lt;clabbe.montjoie@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net-next: stmmac: add optional setup function</title>
<updated>2017-06-01T18:53:03Z</updated>
<author>
<name>LABBE Corentin</name>
<email>clabbe.montjoie@gmail.com</email>
</author>
<published>2017-05-31T07:18:33Z</published>
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<id>urn:sha1:ec33d71de7309c50531c2ae0eb178244899e6e46</id>
<content type='text'>
Instead of adding more ifthen logic for adding a new mac_device_info
setup function, it is easier to add a function pointer to the function
needed.

Signed-off-by: Corentin Labbe &lt;clabbe.montjoie@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: Use AVB mode by default</title>
<updated>2017-03-22T19:15:15Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-03-21T15:12:11Z</published>
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<id>urn:sha1:2d72d5016f00fc7d64b95e79405787dea73669af</id>
<content type='text'>
Prior to the recent multi-queue changes the driver would configure the
queues to use the AVB mode, but the mode then got switched to DCB. The
hardware still works fine in DCB mode, but my testing capabilities are
limited, so it's safer to revert to the prior setting anyway.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-By: Joao Pinto &lt;jpinto@synopsys.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: RX queue routing configuration</title>
<updated>2017-03-22T00:24:01Z</updated>
<author>
<name>Joao Pinto</name>
<email>Joao.Pinto@synopsys.com</email>
</author>
<published>2017-03-17T16:11:07Z</published>
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<id>urn:sha1:abe80fdc6ee664b2f8515f91b45e852b65dbb1a1</id>
<content type='text'>
This patch adds the configuration of RX queues' routing.

Signed-off-by: Joao Pinto &lt;jpinto@synopsys.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: TX and RX queue priority configuration</title>
<updated>2017-03-22T00:24:01Z</updated>
<author>
<name>Joao Pinto</name>
<email>Joao.Pinto@synopsys.com</email>
</author>
<published>2017-03-17T16:11:06Z</published>
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<id>urn:sha1:a8f5102af2a7740a4b3200a27beddf27f23f921a</id>
<content type='text'>
This patch adds the configuration of RX and TX queues' priority.

Signed-off-by: Joao Pinto &lt;jpinto@synopsys.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: configuration of CBS in case of a TX AVB queue</title>
<updated>2017-03-13T06:41:04Z</updated>
<author>
<name>Joao Pinto</name>
<email>Joao.Pinto@synopsys.com</email>
</author>
<published>2017-03-10T18:24:59Z</published>
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<id>urn:sha1:19d9187317979cf0c25f67017d2676149abc46b2</id>
<content type='text'>
This patch adds the configuration of the AVB Credit-Based Shaper.

Signed-off-by: Joao Pinto &lt;jpinto@synopsys.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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