diff options
| author | Tomasz Nowicki <tn@semihalf.com> | 2017-03-29 14:16:13 +0200 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-04-24 11:58:56 -0500 |
| commit | cd183740480f045600aa1fa38fe70809b5498f05 (patch) | |
| tree | c0d3eb84ab9cd7c1f50fb7127bfb792cac1e85d4 | |
| parent | ced414a14f709fc0af60bd381ba8a566dc566869 (diff) | |
PCI/ACPI: Add ThunderX pass2.x 2nd node MCFG quirk
Currently SoCs pass2.x do not emulate EA headers for ACPI boot method at
all. However, for pass2.x some devices (like EDAC) advertise incorrect
base addresses in their BARs which results in driver probe failure during
resource request. Since all problematic blocks are on 2nd NUMA node under
domain 10 add necessary quirk entry to obtain BAR addresses correction
using EA header emulation.
Fixes: 44f22bd91e88 ("PCI: Add MCFG quirks for Cavium ThunderX pass2.x host controller")
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Robert Richter <rrichter@cavium.com>
CC: stable@vger.kernel.org # v4.10+
| -rw-r--r-- | drivers/acpi/pci_mcfg.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c index 65affd8f29c1..a4e8432fc2fb 100644 --- a/drivers/acpi/pci_mcfg.c +++ b/drivers/acpi/pci_mcfg.c @@ -101,6 +101,7 @@ static struct mcfg_fixup mcfg_quirks[] = { /* SoC pass2.x */ THUNDER_PEM_QUIRK(1, 0), THUNDER_PEM_QUIRK(1, 1), + THUNDER_ECAM_QUIRK(1, 10), /* SoC pass1.x */ THUNDER_PEM_QUIRK(2, 0), /* off-chip devices */ |