diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2016-12-21 20:19:57 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-12-25 10:47:44 +0100 |
| commit | 008b69e4d52f2cbee3ed0d0502edd78155000b1a (patch) | |
| tree | 13999bb6068247de2254d20fb9fcd541362c8602 | |
| parent | 6896bcd198df04777820cab4acc70142e87d5ce0 (diff) | |
irqchip/armada-xp: Consolidate hotplug state space
The mpic is either the main interrupt controller or is cascaded behind a
GIC. The mpic is single instance and the modes are mutually exclusive, so
there is no reason to have seperate cpu hotplug states.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Link: http://lkml.kernel.org/r/20161221192112.333161745@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| -rw-r--r-- | drivers/irqchip/irq-armada-370-xp.c | 2 | ||||
| -rw-r--r-- | include/linux/cpuhotplug.h | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 9d9c2c45916a..eb0d4d41b156 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -583,7 +583,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, #endif } else { #ifdef CONFIG_SMP - cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_CASC_STARTING, + cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_XP_STARTING, "irqchip/armada/cascade:starting", mpic_cascaded_starting_cpu, NULL); #endif diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index 45c786cbb324..20bfefbe7594 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -82,7 +82,6 @@ enum cpuhp_state { CPUHP_AP_IRQ_GIC_STARTING, CPUHP_AP_IRQ_HIP04_STARTING, CPUHP_AP_IRQ_ARMADA_XP_STARTING, - CPUHP_AP_IRQ_ARMADA_CASC_STARTING, CPUHP_AP_IRQ_BCM2836_STARTING, CPUHP_AP_ARM_MVEBU_COHERENCY, CPUHP_AP_PERF_X86_UNCORE_STARTING, |