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authorRay Jui <ray.jui@broadcom.com>2018-05-28 11:01:36 -0700
committerFlorian Fainelli <f.fainelli@gmail.com>2018-07-09 10:39:30 -0700
commit71e962a0c2d0646cc20f9a02e713fb5e01ea2756 (patch)
treec5782289febe9f28817435b0c13845c1ac027b26
parenta0061fc283bc4f8ac5f7f4b717ca089100124518 (diff)
arm64: dts: set initial SR watchdog timeout to 60 seconds
Set initial Stingray watchdog timeout to 60 seconds By the time when the userspace watchdog daemon is ready and taking control over, the watchdog timeout will then be reset to what's configured in the daemon. Signed-off-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-rw-r--r--arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 601347882b0d..dae9e3dd6372 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -427,6 +427,7 @@
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>;
clock-names = "wdogclk", "apb_pclk";
+ timeout-sec = <60>;
};
gpio_hsls: gpio@d0000 {