diff options
| author | Andre Przywara <andre.przywara@amd.com> | 2009-06-24 12:44:34 +0200 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2009-09-10 08:33:03 +0300 |
| commit | 1fdbd48c242db996107f72ae4140ffe8163e26a8 (patch) | |
| tree | 39180cfe8ba8268d7c67713446d78f1e19dfd5b0 | |
| parent | 8f1589d95e5eab1ed287f217a33656e922cdbdd0 (diff) | |
KVM: ignore reads from AMDs C1E enabled MSR
If the Linux kernel detects an C1E capable AMD processor (K8 RevF and
higher), it will access a certain MSR on every attempt to go to halt.
Explicitly handle this read and return 0 to let KVM run a Linux guest
with the native AMD host CPU propagated to the guest.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
| -rw-r--r-- | arch/x86/kvm/x86.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index cae5b12bf938..6aace61fdb62 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1038,6 +1038,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) case MSR_P6_EVNTSEL0: case MSR_P6_EVNTSEL1: case MSR_K7_EVNTSEL0: + case MSR_K8_INT_PENDING_MSG: data = 0; break; case MSR_MTRRcap: |