diff options
author | Alexandre Macabies <web+oss@zopieux.com> | 2016-04-12 18:53:02 +0200 |
---|---|---|
committer | Marcel Holtmann <marcel@holtmann.org> | 2016-04-13 10:36:02 +0200 |
commit | 87820441c402f5fde42a84ae96ffb4cbd4109510 (patch) | |
tree | 826f2c67f7871c70fd5eec8bd166cc7fefb78d5c | |
parent | 5a62f3c6de73bd0b4ac40a33674d20f1bfb586d5 (diff) |
mrf24j40: apply the security-enabled bit on secured outbound frames
We set the TXNSECEN bit of register TXNCON to on when transmitting a
security-enabled frame, as described in section 3.12.2 of the MRF
datasheet.
Signed-off-by: Alexander Aring <aar@pengutronix.de>
Signed-off-by: Alexandre Macabies <web+oss@zopieux.com>
Reviewed-by: Stefan Schmidt <stefan@osg.samsung.com>
Acked-by: Alan Ott <alan@signal11.us>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
-rw-r--r-- | drivers/net/ieee802154/mrf24j40.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/ieee802154/mrf24j40.c b/drivers/net/ieee802154/mrf24j40.c index adc67be2e04f..f446db828561 100644 --- a/drivers/net/ieee802154/mrf24j40.c +++ b/drivers/net/ieee802154/mrf24j40.c @@ -61,6 +61,7 @@ #define REG_TXBCON0 0x1A #define REG_TXNCON 0x1B /* Transmit Normal FIFO Control */ #define BIT_TXNTRIG BIT(0) +#define BIT_TXNSECEN BIT(1) #define BIT_TXNACKREQ BIT(2) #define REG_TXG1CON 0x1C @@ -551,6 +552,9 @@ static void write_tx_buf_complete(void *context) u8 val = BIT_TXNTRIG; int ret; + if (ieee802154_is_secen(fc)) + val |= BIT_TXNSECEN; + if (ieee802154_is_ackreq(fc)) val |= BIT_TXNACKREQ; |