diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2023-10-26 17:06:37 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2023-10-26 17:06:42 +0200 |
| commit | 736a4aad8a9fdcf577ffa33b33df240c67557af8 (patch) | |
| tree | f61fa27fa108b1582758235249cb1cf07b270ecb | |
| parent | 291c0d3a98afb7b863485215c241a851be9e3435 (diff) | |
| parent | 9eab43facdadb7d00456c2657001ae2e5353c814 (diff) | |
Merge tag 'renesas-fixes-for-v6.6-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes
Renesas fixes for v6.6 (take three)
- Sort out a few Kconfig dependency issues for the rich set of RISC-V
non-coherent DMA support.
* tag 'renesas-fixes-for-v6.6-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM
riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM and ERRATA_THEAD_PBMT
riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT
Link: https://lore.kernel.org/r/cover.1698312384.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/riscv/Kconfig | 3 | ||||
| -rw-r--r-- | arch/riscv/Kconfig.errata | 1 | ||||
| -rw-r--r-- | drivers/cache/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/soc/renesas/Kconfig | 1 |
4 files changed, 4 insertions, 3 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d607ab0f7c6d..9c48fecc6719 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -273,11 +273,9 @@ config RISCV_DMA_NONCOHERENT select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_DEVICE select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB - select DMA_DIRECT_REMAP if MMU config RISCV_NONSTANDARD_CACHE_OPS bool - depends on RISCV_DMA_NONCOHERENT help This enables function pointer support for non-standard noncoherent systems to handle cache management. @@ -550,6 +548,7 @@ config RISCV_ISA_ZICBOM depends on RISCV_ALTERNATIVE default y select RISCV_DMA_NONCOHERENT + select DMA_DIRECT_REMAP help Adds support to dynamically detect the presence of the ZICBOM extension (Cache Block Management Operations) and enable its diff --git a/arch/riscv/Kconfig.errata b/arch/riscv/Kconfig.errata index 566bcefeab50..e2c731cfed8c 100644 --- a/arch/riscv/Kconfig.errata +++ b/arch/riscv/Kconfig.errata @@ -77,6 +77,7 @@ config ERRATA_THEAD_PBMT config ERRATA_THEAD_CMO bool "Apply T-Head cache management errata" depends on ERRATA_THEAD && MMU + select DMA_DIRECT_REMAP select RISCV_DMA_NONCOHERENT default y help diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig index a57677f908f3..d6e5e3abaad8 100644 --- a/drivers/cache/Kconfig +++ b/drivers/cache/Kconfig @@ -3,7 +3,7 @@ menu "Cache Drivers" config AX45MP_L2_CACHE bool "Andes Technology AX45MP L2 Cache controller" - depends on RISCV_DMA_NONCOHERENT + depends on RISCV select RISCV_NONSTANDARD_CACHE_OPS help Support for the L2 cache controller on Andes Technology AX45MP platforms. diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 93f42c159ad4..acc812e490d0 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -335,6 +335,7 @@ config ARCH_R9A07G043 bool "RISC-V Platform support for RZ/Five" depends on NONPORTABLE depends on RISCV_ALTERNATIVE + depends on !RISCV_ISA_ZICBOM depends on RISCV_SBI select ARCH_RZG2L select AX45MP_L2_CACHE |