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authorConor Dooley <conor.dooley@microchip.com>2022-11-09 21:22:18 +0000
committerArnd Bergmann <arnd@arndb.de>2022-11-15 16:48:02 +0100
commit5836bf833a763e1573ce6fe5d0c310af23ebd49d (patch)
tree2a56c0c58dcf04428bdc99cfefdab262859b2e66
parentbe7d172b0f911e356a1cba5ea96f8e5a116bb7cb (diff)
MAINTAINERS: generify the Microchip RISC-V entry name
These drivers work on our other FPGAs, for example the non-SoC PolarFire connected to an FU-540 via chiplink. Make the entry a wee bit more generic to match. While at it, remove the / from the heading so that it matches other, neighbouring RISC-V entries. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20221109212219.1598355-3-conor@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--MAINTAINERS2
1 files changed, 1 insertions, 1 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index f411c4f136d0..c718a8be1297 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17725,7 +17725,7 @@ F: arch/riscv/
N: riscv
K: riscv
-RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
+RISC-V MICROCHIP FPGA SUPPORT
M: Conor Dooley <conor.dooley@microchip.com>
M: Daire McNamara <daire.mcnamara@microchip.com>
L: linux-riscv@lists.infradead.org