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author | Lucas Stach <l.stach@pengutronix.de> | 2018-11-15 15:12:46 +0100 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2018-12-12 10:01:45 +0530 |
commit | 3c2ce40b2fbb52b5e861f8664f5422d39f11b39e (patch) | |
tree | 6b517376ad6f44d6b01bbd7c2d4f333f3ccf4b57 | |
parent | 03e7d002526dc447902d15aba7d24919d9a13f92 (diff) |
dt-bindings: phy: add binding for Freescale i.MX8MQ USB3 PHY
This adds the binding for the USB3 PHY found on the i.MX8M SoC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-rw-r--r-- | Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt new file mode 100644 index 000000000000..a22e853d710c --- /dev/null +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt @@ -0,0 +1,17 @@ +* Freescale i.MX8MQ USB3 PHY binding + +Required properties: +- compatible: Should be "fsl,imx8mq-usb-phy" +- #phys-cells: must be 0 (see phy-bindings.txt in this directory) +- reg: The base address and length of the registers +- clocks: phandles to the clocks for each clock listed in clock-names +- clock-names: must contain "phy" + +Example: + usb3_phy0: phy@381f0040 { + compatible = "fsl,imx8mq-usb-phy"; + reg = <0x381f0040 0x40>; + clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>; + clock-names = "phy"; + #phy-cells = <0>; + }; |