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authorTao Zhou <tao.zhou1@amd.com>2020-10-02 11:56:29 -0400
committerAlex Deucher <alexander.deucher@amd.com>2020-10-12 14:01:12 -0400
commit462c272b9076e80cda8602b9db81f8d105e729b3 (patch)
tree10052b02d3703c954418628efa2be6e0c2b2d0cd
parent0a305e34c719f5d6131a3dedb5164b091999510b (diff)
drm/amdgpu: add psp support for dimgrey_cavefish(v2)
General psp support for dimgrey_cavefish. v2: remove the checks for asd load and reroute ih. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c5
-rw-r--r--drivers/gpu/drm/amd/amdgpu/psp_v11_0.c13
2 files changed, 16 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index d91d951d018e..cad4767ca2bb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -101,6 +101,7 @@ static int psp_early_init(void *handle)
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
+ case CHIP_DIMGREY_CAVEFISH:
psp_v11_0_set_psp_funcs(psp);
psp->autoload_supported = true;
break;
@@ -1968,8 +1969,8 @@ static int psp_np_fw_load(struct psp_context *psp)
continue;
if (psp->autoload_supported &&
- (adev->asic_type == CHIP_SIENNA_CICHLID ||
- adev->asic_type == CHIP_NAVY_FLOUNDER) &&
+ (adev->asic_type >= CHIP_SIENNA_CICHLID &&
+ adev->asic_type <= CHIP_DIMGREY_CAVEFISH) &&
(ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1 ||
ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2 ||
ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3))
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 1d417367ffac..1a69c212ce68 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -61,6 +61,8 @@ MODULE_FIRMWARE("amdgpu/navy_flounder_sos.bin");
MODULE_FIRMWARE("amdgpu/navy_flounder_ta.bin");
MODULE_FIRMWARE("amdgpu/vangogh_asd.bin");
MODULE_FIRMWARE("amdgpu/vangogh_toc.bin");
+MODULE_FIRMWARE("amdgpu/dimgrey_cavefish_sos.bin");
+MODULE_FIRMWARE("amdgpu/dimgrey_cavefish_asd.bin");
/* address block */
#define smnMP1_FIRMWARE_FLAGS 0x3010024
@@ -110,6 +112,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
case CHIP_VANGOGH:
chip_name = "vangogh";
break;
+ case CHIP_DIMGREY_CAVEFISH:
+ chip_name = "dimgrey_cavefish";
+ break;
default:
BUG();
}
@@ -194,6 +199,14 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
if (err)
return err;
break;
+ case CHIP_DIMGREY_CAVEFISH:
+ err = psp_init_sos_microcode(psp, chip_name);
+ if (err)
+ return err;
+ err = psp_init_asd_microcode(psp, chip_name);
+ if (err)
+ return err;
+ break;
case CHIP_VANGOGH:
err = psp_init_asd_microcode(psp, chip_name);
if (err)