diff options
| author | Sunil Khatri <sunil.khatri@amd.com> | 2024-07-09 11:28:22 +0530 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-07-10 10:13:22 -0400 |
| commit | c39385710cfd9ef22f6a2405d01ebcd6019e8767 (patch) | |
| tree | 023e28d45a6b8a1226bbfd233c3c2a8f9a3a6086 | |
| parent | 21e6f6085bbc979b5cc3f97857e66387ec550c48 (diff) | |
drm/amdgpu: select compute ME engines dynamically
GFX ME right now is one but this could change in
future SOC's. Use no of ME for GFX as start point
for ME for compute for GFX12.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c index 084b039eb765..f384be0d1800 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c @@ -4946,7 +4946,7 @@ static void gfx_v12_ip_dump(void *handle) for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) { /* ME0 is for GFX so start from 1 for CP */ - soc24_grbm_select(adev, 1+i, j, k, 0); + soc24_grbm_select(adev, adev->gfx.me.num_me + i, j, k, 0); for (reg = 0; reg < reg_count; reg++) { adev->gfx.ip_dump_compute_queues[index + reg] = RREG32(SOC15_REG_ENTRY_OFFSET( |