diff options
| author | Curtis Malainey <cujomalainey@chromium.org> | 2019-05-29 12:30:48 -0700 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-05-30 16:32:34 +0100 |
| commit | f499edf9fa90f184af9f457fd0912a788754af25 (patch) | |
| tree | f2dc7671875c0e80c7fe41eb3216770f11316e83 | |
| parent | b19671d6caf1ac393681864d5d85dda9fa99a448 (diff) | |
ASoC: rt5677: Add missing voice activation register definitions
Most of the voice activation definitions were missing, they will be
needed for when hotwording is added. Also the source bits are only 2
wide not 3 and needed to be corrected.
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | sound/soc/codecs/rt5677.h | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h index 11a2ffceec3b..076e5161d8da 100644 --- a/sound/soc/codecs/rt5677.h +++ b/sound/soc/codecs/rt5677.h @@ -1456,9 +1456,37 @@ #define RT5677_I2S4_CLK_SEL_MASK (0xf) #define RT5677_I2S4_CLK_SEL_SFT 0 +/* VAD Function Control 1 (0x9c) */ +#define RT5677_VAD_MIN_DUR_MASK (0x3 << 13) +#define RT5677_VAD_MIN_DUR_SFT 13 +#define RT5677_VAD_ADPCM_BYPASS (1 << 10) +#define RT5677_VAD_ADPCM_BYPASS_BIT 10 +#define RT5677_VAD_FG2ENC (1 << 9) +#define RT5677_VAD_FG2ENC_BIT 9 +#define RT5677_VAD_BUF_OW (1 << 8) +#define RT5677_VAD_BUF_OW_BIT 8 +#define RT5677_VAD_CLR_FLAG (1 << 7) +#define RT5677_VAD_CLR_FLAG_BIT 7 +#define RT5677_VAD_BUF_POP (1 << 6) +#define RT5677_VAD_BUF_POP_BIT 6 +#define RT5677_VAD_BUF_PUSH (1 << 5) +#define RT5677_VAD_BUF_PUSH_BIT 5 +#define RT5677_VAD_DET_ENABLE (1 << 4) +#define RT5677_VAD_DET_ENABLE_BIT 4 +#define RT5677_VAD_FUNC_ENABLE (1 << 3) +#define RT5677_VAD_FUNC_ENABLE_BIT 3 +#define RT5677_VAD_FUNC_RESET (1 << 2) +#define RT5677_VAD_FUNC_RESET_BIT 2 + /* VAD Function Control 4 (0x9f) */ -#define RT5677_VAD_SRC_MASK (0x7 << 8) +#define RT5677_VAD_OUT_SRC_RATE_MASK (0x1 << 11) +#define RT5677_VAD_OUT_SRC_RATE_SFT 11 +#define RT5677_VAD_OUT_SRC_MASK (0x1 << 10) +#define RT5677_VAD_OUT_SRC_SFT 10 +#define RT5677_VAD_SRC_MASK (0x3 << 8) #define RT5677_VAD_SRC_SFT 8 +#define RT5677_VAD_LV_DIFF_MASK (0xff << 0) +#define RT5677_VAD_LV_DIFF_SFT 0 /* DSP InBound Control (0xa3) */ #define RT5677_IB01_SRC_MASK (0x7 << 12) |