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| author | Florian Fainelli <f.fainelli@gmail.com> | 2019-10-31 14:47:25 -0700 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2019-11-01 10:47:37 +0000 |
| commit | 1cf45b8fdbb87040e1d1bd793891089f4678aa41 (patch) | |
| tree | 1b7b3149e0a42b145bdad778a57dbc2b516ae6fc /Documentation | |
| parent | e059770cb1cdfbcbe3f1748f76005861cc79dd1a (diff) | |
arm64: apply ARM64_ERRATUM_843419 workaround for Brahma-B53 core
The Broadcom Brahma-B53 core is susceptible to the issue described by
ARM64_ERRATUM_843419 so this commit enables the workaround to be applied
when executing on that core.
Since there are now multiple entries to match, we must convert the
existing ARM64_ERRATUM_843419 into an erratum list and use
cpucap_multi_entry_cap_matches to match our entries.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/arm64/silicon-errata.rst | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index 189a1768e26a..5a09661330fc 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -93,6 +93,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | +----------------+-----------------+-----------------+-----------------------------+ +| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 | ++----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | Cavium | ThunderX ITS | #22375,24313 | CAVIUM_ERRATUM_22375 | +----------------+-----------------+-----------------+-----------------------------+ |