diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2024-11-01 15:47:30 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-11-01 15:47:35 +0100 |
| commit | e5c06efdc0306c2831992dd6fa1a0e38db1a9845 (patch) | |
| tree | ee74e4db7cbd037e20f9b97489a45b702eb70437 /MAINTAINERS | |
| parent | 896dcf47670de72335e40e5f71f7160fc494d16c (diff) | |
| parent | 384f2024e1a100b9b977a697f5e7cb151b00550d (diff) | |
Merge tag 'riscv-soc-fixes-for-v6.12-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into HEAD
RISC-V soc fixes for v6.12-rc6
StarFive:
Two minor dts fixes, one setting the correct eth phy delay parameters
and one disabling unused nodes that caused warnings at probe time.
Firmware:
Fix the poll_complete() implementation in the auto-update driver so that
it behaves as the framework expects.
Misc:
Update the maintainer pattern for my dts entry, so that it covers
the specific platforms listed , rather than including all riscv
platforms with the list platforms excluded.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-soc-fixes-for-v6.12-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
MAINTAINERS: invert Misc RISC-V SoC Support's pattern
riscv: dts: starfive: Update ethernet phy0 delay parameter values for Star64
riscv: dts: starfive: disable unused csi/camss nodes
firmware: microchip: auto-update: fix poll_complete() to not report spurious timeout errors
Link: https://lore.kernel.org/r/20241031-colossal-cassette-617817c9bec3@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index e9659a5a7fb3..7c837de46019 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19786,12 +19786,10 @@ L: linux-riscv@lists.infradead.org S: Maintained Q: https://patchwork.kernel.org/project/linux-riscv/list/ T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ -F: Documentation/devicetree/bindings/riscv/ -F: arch/riscv/boot/dts/ -X: arch/riscv/boot/dts/allwinner/ -X: arch/riscv/boot/dts/renesas/ -X: arch/riscv/boot/dts/sophgo/ -X: arch/riscv/boot/dts/thead/ +F: arch/riscv/boot/dts/canaan/ +F: arch/riscv/boot/dts/microchip/ +F: arch/riscv/boot/dts/sifive/ +F: arch/riscv/boot/dts/starfive/ RISC-V PMU DRIVERS M: Atish Patra <atishp@atishpatra.org> |