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authorZhu YiXin <yzhu@maxlinear.com>2023-05-19 12:45:55 +0800
committerBjorn Helgaas <bhelgaas@google.com>2023-05-31 12:20:24 -0500
commit40994ce0ea010b1843e620bacc26d29ddebfc08d (patch)
tree07f8427a636d6735aaacf01d3c53bbef0f338b8f /MAINTAINERS
parentac9a78681b921877518763ba0e89202254349d1b (diff)
MAINTAINERS: Add Chuanhua Lei as Intel LGM GW PCIe maintainer
Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINERS entry for the PCIe driver for Intel LGM GW SoC. Link: https://lore.kernel.org/r/20230519044555.3750-2-yzhu@maxlinear.com Signed-off-by: Zhu YiXin <yzhu@maxlinear.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rahul Tanwar <rahul_tanwar@yahoo.com> Acked-by: Lei Chuanhua <lchuanhua@maxlinear.com>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS2
1 files changed, 1 insertions, 1 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 7e0b87d5aa2e..31c4e5e9c411 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16349,7 +16349,7 @@ F: Documentation/devicetree/bindings/pci/intel,keembay-pcie*
F: drivers/pci/controller/dwc/pcie-keembay.c
PCIE DRIVER FOR INTEL LGM GW SOC
-M: Rahul Tanwar <rtanwar@maxlinear.com>
+M: Chuanhua Lei <lchuanhua@maxlinear.com>
L: linux-pci@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml