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authorArnd Bergmann <arnd@arndb.de>2022-07-18 13:15:26 +0200
committerArnd Bergmann <arnd@arndb.de>2022-07-18 13:18:29 +0200
commit7cb7b8fe63393d773687dd501941933bd3bd2773 (patch)
treee55fa62867fe13b53e033133ac245d9412d8aa23 /MAINTAINERS
parent03c765b0e3b4cb5063276b086c76f7a612856a9a (diff)
parentf6639994a6dded10fe3ee7882c0394dde294ecbf (diff)
Merge branch 'sunplus/newsoc' into arm/newsoc
Merge "Sunplus SP7021 SoC support" from Qin Jian, applied as patches: "Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a single chip. It is designed for industrial control. SP7021 consists of two chips (dies) in a package. One is called C-chip (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level process (22 nm) for high performance computing. The other is called P- chip (peripheral chip). It has many peripherals and an ARM A926 added especially for real-time control. P-chip is made for customers. It adopts low-level process (ex: 0.11 um) to reduce cost. Refer to (for documentations): https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview Refer to (applications): https://tibbo.com/store/plus1.html Refer to (applications): http://www.sinovoip.com.cn/ecp_view.asp?id=586" I left out the clock controller driver, which is still not fully reviewed. There have been 20 revisions of the platform code, and everything else looks good enough, so I hope it's we can simplify the process by separating it out again. Link: https://lore.kernel.org/linux-arm-kernel/0c10fa4ccf3da5d92784b9bbd4177d1d2f1d62a0.1656396767.git.qinjian@cqplus1.com/ * sunplus/newsoc: ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig ARM: sunplus: Add initial support for Sunplus SP7021 SoC irqchip: Add Sunplus SP7021 interrupt controller driver dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller dt-bindings: clock: Add bindings for SP7021 clock driver reset: Add Sunplus SP7021 reset driver dt-bindings: reset: Add bindings for SP7021 reset driver dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS17
1 files changed, 17 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index fe5daf141501..0b13398a60ea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2825,6 +2825,23 @@ F: drivers/clocksource/armv7m_systick.c
N: stm32
N: stm
+ARM/SUNPLUS SP7021 SOC SUPPORT
+M: Qin Jian <qinjian@cqplus1.com>
+L: linux-arm-kernel@lists.infradead.org (moderated for mon-subscribers)
+S: Maintained
+W: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview
+F: Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml
+F: Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml
+F: Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml
+F: Documentation/devicetree/bindings/reset/sunplus,reset.yaml
+F: arch/arm/boot/dts/sunplus-sp7021*.dts*
+F: arch/arm/configs/sp7021_*defconfig
+F: arch/arm/mach-sunplus/
+F: drivers/irqchip/irq-sp7021-intc.c
+F: drivers/reset/reset-sunplus.c
+F: include/dt-bindings/clock/sunplus,sp7021-clkc.h
+F: include/dt-bindings/reset/sunplus,sp7021-reset.h
+
ARM/Synaptics SoC support
M: Jisheng Zhang <jszhang@kernel.org>
M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>