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author | Mark Brown <broonie@kernel.org> | 2021-09-01 17:30:37 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2021-09-01 17:30:37 +0100 |
commit | 0f2ef911de0bdf3a0ea1d9b28e9126d3e018bbd5 (patch) | |
tree | 7d0bc8977cc78fcf949e0b6635a0635841ff0297 /arch/arc/Kconfig | |
parent | 222039a2503e0839f859e18e6f09acb9997480d1 (diff) | |
parent | 38b7673000949ca784fcb8a9feb70d2a802befa6 (diff) |
Merge tag 'asoc-v5.15' into asoc-5.15
ASoC: Updates for v5.15
Quite a quiet release this time, mostly a combination of cleanups
and a good set of new drivers.
- Lots of cleanups and improvements to the Intel drivers,
including some new systems support.
- New support for AMD Vangoh, CUI CMM-4030D-261, Mediatek
Mt8195, Renesas RZ/G2L Mediatek Mt8195, RealTek RT101P,
Renesas RZ/G2L,, Rockchip RK3568 S/PDIF.
Diffstat (limited to 'arch/arc/Kconfig')
-rw-r--r-- | arch/arc/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index d8f51eb8963b..b5bf68e74732 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -409,7 +409,7 @@ choice help Depending on the configuration, CPU can contain DSP registers (ACC0_GLO, ACC0_GHI, DSP_BFLY0, DSP_CTRL, DSP_FFT_CTRL). - Bellow is options describing how to handle these registers in + Below are options describing how to handle these registers in interrupt entry / exit and in context switch. config ARC_DSP_NONE |