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authorKees Cook <keescook@chromium.org>2016-07-25 13:50:36 -0700
committerKees Cook <keescook@chromium.org>2016-07-25 13:50:36 -0700
commit74e630a7582e6b3cb39559d712a0049f08dea8a0 (patch)
tree98a752412dcfc74d802024c1d9e8c541b93174f9 /arch/arc/mm/dma.c
parent35da60941e44dbf57868e67686dd24cc1a33125a (diff)
parent523d939ef98fd712632d93a5a2b588e477a7565e (diff)
Merge tag 'v4.7' into for-linus/pstore
Linux 4.7
Diffstat (limited to 'arch/arc/mm/dma.c')
-rw-r--r--arch/arc/mm/dma.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c
index 8c8e36fa5659..73d7e4c75b7d 100644
--- a/arch/arc/mm/dma.c
+++ b/arch/arc/mm/dma.c
@@ -10,7 +10,7 @@
* DMA Coherent API Notes
*
* I/O is inherently non-coherent on ARC. So a coherent DMA buffer is
- * implemented by accessintg it using a kernel virtual address, with
+ * implemented by accessing it using a kernel virtual address, with
* Cache bit off in the TLB entry.
*
* The default DMA address == Phy address which is 0x8000_0000 based.