summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/qcom/sc7180-lite.dtsi
diff options
context:
space:
mode:
authorSibi Sankar <sibis@codeaurora.org>2020-11-24 11:51:15 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2020-11-24 17:04:30 -0600
commit8fd01e01fd6f8ba67e4ed8c5be0ab76d06156287 (patch)
tree1d8cc1b996e9d68ec78d022064fa907d31d890b1 /arch/arm64/boot/dts/qcom/sc7180-lite.dtsi
parentd4b85bc550f49e46cf1d945a342d316c814e94c5 (diff)
arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite
Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC since the gold cores only support frequencies upto 2.1 GHz. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/1606198876-3515-1-git-send-email-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7180-lite.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7180-lite.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180-lite.dtsi b/arch/arm64/boot/dts/qcom/sc7180-lite.dtsi
new file mode 100644
index 000000000000..d8ed1d7b4ec7
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7180-lite.dtsi
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * SC7180 lite device tree source
+ *
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+&cpu6_opp10 {
+ opp-peak-kBps = <7216000 22425600>;
+};
+
+&cpu6_opp11 {
+ opp-peak-kBps = <7216000 22425600>;
+};
+
+&cpu6_opp12 {
+ opp-peak-kBps = <8532000 23347200>;
+};