diff options
author | Jonas Karlman <jonas@kwiboo.se> | 2024-05-21 21:10:11 +0000 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2024-05-28 00:35:38 +0200 |
commit | 36d3bbc8cdbef2f83391f7708888265ac4c37a99 (patch) | |
tree | 57643378620bd5c838e3867adb1df1f892ea8cf8 /arch/arm64/boot/dts/rockchip/rk3308.dtsi | |
parent | 4b64ed510ed946a4e4ca6d51d6512bf5361f6a04 (diff) |
arm64: dts: rockchip: Add OTP device node for RK3308
The RK3308 SoC contains a controller for one-time-programmable memory,
add a device node for it.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240521211029.1236094-9-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3308.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 962ea893999b..ca2a20893fd0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -556,6 +556,30 @@ status = "disabled"; }; + otp: efuse@ff210000 { + compatible = "rockchip,rk3308-otp"; + reg = <0x0 0xff210000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, + <&cru PCLK_OTP_PHY>; + clock-names = "otp", "apb_pclk", "phy"; + resets = <&cru SRST_OTP_PHY>; + reset-names = "phy"; + + cpu_id: id@7 { + reg = <0x07 0x10>; + }; + + cpu_leakage: cpu-leakage@17 { + reg = <0x17 0x1>; + }; + + logic_leakage: logic-leakage@18 { + reg = <0x18 0x1>; + }; + }; + dmac0: dma-controller@ff2c0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xff2c0000 0x0 0x4000>; |