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| author | Catalin Marinas <catalin.marinas@arm.com> | 2017-12-11 16:10:30 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-12-11 16:10:30 +0000 |
| commit | 6aef0fdd35ead88cd651391dcc03562938a7612c (patch) | |
| tree | 339eb5355819f1bd6a842d8fc3c2fd6524c14327 /arch/arm64/include/asm/mmu_context.h | |
| parent | 50c4c4e268a2d7a3e58ebb698ac74da0de40ae36 (diff) | |
| parent | 6c27c4082f4f70b9f41df4d0adf51128b40351df (diff) | |
Merge branch 'kpti' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Support for unmapping the kernel when running in userspace (aka
"KAISER").
* 'kpti' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: kaslr: Put kernel vectors address in separate data page
arm64: mm: Introduce TTBR_ASID_MASK for getting at the ASID in the TTBR
perf: arm_spe: Fail device probe when arm64_kernel_unmapped_at_el0()
arm64: Kconfig: Add CONFIG_UNMAP_KERNEL_AT_EL0
arm64: entry: Add fake CPU feature for unmapping the kernel at EL0
arm64: tls: Avoid unconditional zeroing of tpidrro_el0 for native tasks
arm64: erratum: Work around Falkor erratum #E1003 in trampoline code
arm64: entry: Hook up entry trampoline to exception vectors
arm64: entry: Explicitly pass exception level to kernel_ventry macro
arm64: mm: Map entry trampoline into trampoline and kernel page tables
arm64: entry: Add exception trampoline page for exceptions from EL0
arm64: mm: Invalidate both kernel and user ASIDs when performing TLBI
arm64: mm: Add arm64_kernel_unmapped_at_el0 helper
arm64: mm: Allocate ASIDs in pairs
arm64: mm: Fix and re-enable ARM64_SW_TTBR0_PAN
arm64: mm: Rename post_ttbr0_update_workaround
arm64: mm: Remove pre_ttbr0_update_workaround for Falkor erratum #E1003
arm64: mm: Move ASID from TTBR0 to TTBR1
arm64: mm: Temporarily disable ARM64_SW_TTBR0_PAN
arm64: mm: Use non-global mappings for kernel space
Diffstat (limited to 'arch/arm64/include/asm/mmu_context.h')
| -rw-r--r-- | arch/arm64/include/asm/mmu_context.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 9d155fa9a507..da29766a181c 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -19,8 +19,6 @@ #ifndef __ASM_MMU_CONTEXT_H #define __ASM_MMU_CONTEXT_H -#define FALKOR_RESERVED_ASID 1 - #ifndef __ASSEMBLY__ #include <linux/compiler.h> @@ -57,6 +55,13 @@ static inline void cpu_set_reserved_ttbr0(void) isb(); } +static inline void cpu_switch_mm(pgd_t *pgd, struct mm_struct *mm) +{ + BUG_ON(pgd == swapper_pg_dir); + cpu_set_reserved_ttbr0(); + cpu_do_switch_mm(virt_to_phys(pgd),mm); +} + /* * TCR.T0SZ value to use when the ID map is active. Usually equals * TCR_T0SZ(VA_BITS), unless system RAM is positioned very high in |