diff options
| author | Marek Vasut <marex@denx.de> | 2024-07-05 10:01:02 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-09-05 11:31:55 +0200 |
| commit | 44791c0fe327d3e43447094b0abca3bd768b16e4 (patch) | |
| tree | a1876be6b56882781c4f7f892933555034ba6b23 /arch/arm | |
| parent | b230e1b21c6217647d8452eab4c43420ef02b58d (diff) | |
ARM: dts: stm32: Disable PHY clock output on DH STM32MP13xx DHCOR DHSBC board
The RTL8211F PHY clock output is not used on DH STM32MP13xx DHCOR DHSBC
board, disable it to improve EMI characteristics.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts index bacb70b4256b..201fb6a291cc 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts @@ -94,6 +94,7 @@ interrupt-parent = <&gpiog>; interrupts = <12 IRQ_TYPE_LEVEL_LOW>; reg = <1>; + realtek,clkout-disable; reset-assert-us = <15000>; reset-deassert-us = <55000>; reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>; @@ -121,6 +122,7 @@ interrupt-parent = <&gpiog>; interrupts = <15 IRQ_TYPE_LEVEL_LOW>; reg = <1>; + realtek,clkout-disable; reset-assert-us = <15000>; reset-deassert-us = <55000>; reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>; |