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authorJiaxun Yang <jiaxun.yang@flygoat.com>2024-06-12 09:54:32 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2024-07-03 16:50:12 +0200
commit580724fce27f2b71b3e4d58bbe6d83b671929b33 (patch)
tree05ef18ae651605975ebf08b18b7dd1c3aef29629 /arch/mips/include
parent7464c0762e96904b6bf686a4dc8b3255adf1c890 (diff)
MIPS: sync-r4k: Rework based on x86 tsc_sync
The original sync-r4k did a good job on reducing jitter by determine the "next time value", but it has a limitation that when synchronization being performed too many times due to high core count or CPU hotplug, the timewrap on CPU0 will become unaccpetable. Rework the mechanism based on latest x86 tsc_sync. (It seems like the original implementation is based on tsc_sync at that time, so it's just a refresh.) To improve overall performance. Tesed on Loongson64, Boston, QEMU. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/r4k-timer.h5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/mips/include/asm/r4k-timer.h b/arch/mips/include/asm/r4k-timer.h
index 6e7361629348..432e61dd5204 100644
--- a/arch/mips/include/asm/r4k-timer.h
+++ b/arch/mips/include/asm/r4k-timer.h
@@ -12,15 +12,10 @@
#ifdef CONFIG_SYNC_R4K
-extern void synchronise_count_master(int cpu);
extern void synchronise_count_slave(int cpu);
#else
-static inline void synchronise_count_master(int cpu)
-{
-}
-
static inline void synchronise_count_slave(int cpu)
{
}