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authorStafford Horne <shorne@gmail.com>2020-06-24 04:44:05 +0900
committerStafford Horne <shorne@gmail.com>2020-08-04 10:59:45 +0900
commitc28b27416da91659ad580074db6756b2ab7e62da (patch)
tree4c9463d6d6bc0121c76e33ba751558fa84bf5d8f /arch/openrisc/mm
parent57b8e277c33620e115633cdf700a260b55095460 (diff)
openrisc: Implement proper SMP tlb flushing
Up until now when flushing pages from the TLB on SMP OpenRISC was always resorting to flush the entire TLB on all CPUs. This patch adds the mechanics for flushing specific ranges and pages based on the usage. The function switch_mm is updated to account for cpu usage by updating mm_struct's cpumask. This is used in the SMP flush routines. This mostly follows the riscv implementation. Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/openrisc/mm')
-rw-r--r--arch/openrisc/mm/tlb.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/arch/openrisc/mm/tlb.c b/arch/openrisc/mm/tlb.c
index 4b680aed8f5f..2b6feabf6381 100644
--- a/arch/openrisc/mm/tlb.c
+++ b/arch/openrisc/mm/tlb.c
@@ -137,21 +137,28 @@ void local_flush_tlb_mm(struct mm_struct *mm)
void switch_mm(struct mm_struct *prev, struct mm_struct *next,
struct task_struct *next_tsk)
{
+ unsigned int cpu;
+
+ if (unlikely(prev == next))
+ return;
+
+ cpu = smp_processor_id();
+
+ cpumask_clear_cpu(cpu, mm_cpumask(prev));
+ cpumask_set_cpu(cpu, mm_cpumask(next));
+
/* remember the pgd for the fault handlers
* this is similar to the pgd register in some other CPU's.
* we need our own copy of it because current and active_mm
* might be invalid at points where we still need to derefer
* the pgd.
*/
- current_pgd[smp_processor_id()] = next->pgd;
+ current_pgd[cpu] = next->pgd;
/* We don't have context support implemented, so flush all
* entries belonging to previous map
*/
-
- if (prev != next)
- local_flush_tlb_mm(prev);
-
+ local_flush_tlb_mm(prev);
}
/*