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author | Paul Mackerras <paulus@ozlabs.org> | 2017-08-30 14:12:26 +1000 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-09-01 16:39:48 +1000 |
commit | ee0a54d7978874fb2ba3b1e61e88ffffd31fcbc9 (patch) | |
tree | 8b01909e96aeb5fa073b87e7b753e706d1e7aa7e /arch/powerpc/include | |
parent | 3cdfcbfd32b9d1c0d4a6fa80ee9c390927aab948 (diff) |
powerpc: Don't check MSR FP/VMX/VSX enable bits in analyse_instr()
This removes the checks for the FP/VMX/VSX enable bits in the MSR
from analyse_instr() and adds them to emulate_step() instead.
The reason for this is that we may want to use analyse_instr() in
a situation where the FP/VMX/VSX register values are stored in the
current thread_struct and the FP/VMX/VSX enable bits in the MSR
image in the pt_regs are zero. Since analyse_instr() doesn't make
any changes to register state, it is reasonable for it to indicate
what the effect of an instruction would be even though the relevant
enable bit is off.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include')
0 files changed, 0 insertions, 0 deletions