summaryrefslogtreecommitdiff
path: root/arch/powerpc/perf
diff options
context:
space:
mode:
authorParth Shah <parth@linux.ibm.com>2021-07-28 23:26:07 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2021-08-04 10:53:39 +1000
commite9ef81e1079b0c4c374fba0f9affa7129c7c913b (patch)
tree6715fb49cda98b91be61f073c8254764ec9f2921 /arch/powerpc/perf
parent69aa8e078545bc14d84a8b4b3cb914ac8f9f280e (diff)
powerpc/smp: Use existing L2 cache_map cpumask to find L3 cache siblings
On POWER10 systems, the "ibm,thread-groups" property "2" indicates the cpus in thread-group share both L2 and L3 caches. Hence, use cache_property = 2 itself to find both the L2 and L3 cache siblings. Hence, create a new thread_group_l3_cache_map to keep list of L3 siblings, but fill the mask using same property "2" array. Signed-off-by: Parth Shah <parth@linux.ibm.com> Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210728175607.591679-4-parth@linux.ibm.com
Diffstat (limited to 'arch/powerpc/perf')
0 files changed, 0 insertions, 0 deletions