diff options
| author | Benjamin Berg <benjamin.berg@intel.com> | 2024-09-19 14:45:11 +0200 |
|---|---|---|
| committer | Johannes Berg <johannes.berg@intel.com> | 2024-10-10 13:37:22 +0200 |
| commit | 41ab5fe7471ff38d2909d1c93b88197a89c6a00f (patch) | |
| tree | ea76a3b75fd7d8d2b7a4be194e74081113d0b595 /arch/um/include/asm/pgtable.h | |
| parent | e167cc7a95fe01e228e403ac90090f8613e7d8bc (diff) | |
um: Switch to 4 level page tables on 64 bit
The larger memory space is useful to support more applications inside
UML. One example for this is ASAN instrumentation of userspace
applications which requires addresses that would otherwise not be
available.
Signed-off-by: Benjamin Berg <benjamin.berg@intel.com>
Link: https://patch.msgid.link/20240919124511.282088-11-benjamin@sipsolutions.net
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Diffstat (limited to 'arch/um/include/asm/pgtable.h')
| -rw-r--r-- | arch/um/include/asm/pgtable.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/um/include/asm/pgtable.h b/arch/um/include/asm/pgtable.h index 83373c9963e7..bd7a9593705f 100644 --- a/arch/um/include/asm/pgtable.h +++ b/arch/um/include/asm/pgtable.h @@ -24,10 +24,12 @@ /* We borrow bit 10 to store the exclusive marker in swap PTEs. */ #define _PAGE_SWP_EXCLUSIVE 0x400 -#ifdef CONFIG_3_LEVEL_PGTABLES -#include <asm/pgtable-3level.h> -#else +#if CONFIG_PGTABLE_LEVELS == 4 +#include <asm/pgtable-4level.h> +#elif CONFIG_PGTABLE_LEVELS == 2 #include <asm/pgtable-2level.h> +#else +#error "Unsupported number of page table levels" #endif extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; |