diff options
| author | Christoph Hellwig <hch@lst.de> | 2020-04-08 17:27:42 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2020-04-20 12:39:11 +0200 |
| commit | 1f6f655e01adebf5bd5e6c3da2e843c104ded051 (patch) | |
| tree | 8c382295cdeffe4367294800b384bb99beea9e22 /arch/x86/mm | |
| parent | ae83d0b416db002fe95601e7f97f64b59514d936 (diff) | |
x86/mm: Add a x86_has_pat_wp() helper
Abstract the ioremap code away from the caching mode internals.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200408152745.1565832-2-hch@lst.de
Diffstat (limited to 'arch/x86/mm')
| -rw-r--r-- | arch/x86/mm/init.c | 6 | ||||
| -rw-r--r-- | arch/x86/mm/ioremap.c | 8 |
2 files changed, 8 insertions, 6 deletions
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index 1bba16c5742b..6005f83b8111 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -71,6 +71,12 @@ uint8_t __pte2cachemode_tbl[8] = { }; EXPORT_SYMBOL(__pte2cachemode_tbl); +/* Check that the write-protect PAT entry is set for write-protect */ +bool x86_has_pat_wp(void) +{ + return __pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] == _PAGE_CACHE_MODE_WP; +} + static unsigned long __initdata pgt_buf_start; static unsigned long __initdata pgt_buf_end; static unsigned long __initdata pgt_buf_top; diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index 18c637c0dc6f..41536f523a5f 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -778,10 +778,8 @@ void __init *early_memremap_encrypted(resource_size_t phys_addr, void __init *early_memremap_encrypted_wp(resource_size_t phys_addr, unsigned long size) { - /* Be sure the write-protect PAT entry is set for write-protect */ - if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP) + if (!x86_has_pat_wp()) return NULL; - return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC_WP); } @@ -799,10 +797,8 @@ void __init *early_memremap_decrypted(resource_size_t phys_addr, void __init *early_memremap_decrypted_wp(resource_size_t phys_addr, unsigned long size) { - /* Be sure the write-protect PAT entry is set for write-protect */ - if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP) + if (!x86_has_pat_wp()) return NULL; - return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC_WP); } #endif /* CONFIG_AMD_MEM_ENCRYPT */ |