diff options
| author | Baolin Wang <baolin.wang@linaro.org> | 2019-04-10 15:22:50 +0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-05-16 14:43:33 -0700 |
| commit | 15d574fbd3f8ec7705896ed14b74eae482cadd4e (patch) | |
| tree | 55f6287a5c1b5f5b61099ae04ceb845f073cc018 /arch | |
| parent | faff3fcf01effe2be9a7efc165df5af2b5747b73 (diff) | |
arm64: dts: sprd: Add clock properties for serial devices
We've introduced power management logics for the Spreadtrum serial
controller by commit 062ec2774c8a ("serial: sprd: Add power management
for the Spreadtrum serial controller"), thus add related clock properties
to support this feature.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/sprd/whale2.dtsi | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index eb6be5675f79..4bb862c6b083 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -75,7 +75,9 @@ "sprd,sc9836-uart"; reg = <0x0 0x100>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART0_EB>, + <&ap_clk CLK_UART0>, <&ext_26m>; status = "disabled"; }; @@ -84,7 +86,9 @@ "sprd,sc9836-uart"; reg = <0x100000 0x100>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART1_EB>, + <&ap_clk CLK_UART1>, <&ext_26m>; status = "disabled"; }; @@ -93,7 +97,9 @@ "sprd,sc9836-uart"; reg = <0x200000 0x100>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART2_EB>, + <&ap_clk CLK_UART2>, <&ext_26m>; status = "disabled"; }; @@ -102,7 +108,9 @@ "sprd,sc9836-uart"; reg = <0x300000 0x100>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + clock-names = "enable", "uart", "source"; + clocks = <&apapb_gate CLK_UART3_EB>, + <&ap_clk CLK_UART3>, <&ext_26m>; status = "disabled"; }; }; |