diff options
| author | Thierry Reding <treding@nvidia.com> | 2023-02-14 15:05:49 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2023-03-02 10:35:11 +0100 |
| commit | 4bb54c2ce48ffb3a06133ac0fb4086f7b48d9109 (patch) | |
| tree | 8cb9f7fede92d245b375a1e2da05f62fc286c241 /arch | |
| parent | 682e1c498ae793ad90587171c93c1f7ec87aa208 (diff) | |
arm64: tegra: Bump CBB ranges property on Tegra194 and Tegra234
Both Xavier (Tegra194) and Orin (Tegra234) support a 40-bit address map,
so bump the CBB ranges property to cover all of the 1 TiB address space.
This fixes an issue where some of the PCIe regions could not be remapped
because of they were outside the memory specified by the CBB's ranges
property.
Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra234.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 133dbe5b429d..7096b999b33f 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -22,7 +22,7 @@ #address-cells = <2>; #size-cells = <2>; - ranges = <0x0 0x0 0x0 0x0 0x0 0x40000000>; + ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; apbmisc: misc@100000 { compatible = "nvidia,tegra194-misc"; diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 8fe8eda7654d..f1748cff8a33 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -20,7 +20,7 @@ #address-cells = <2>; #size-cells = <2>; - ranges = <0x0 0x0 0x0 0x0 0x0 0x40000000>; + ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; misc@100000 { compatible = "nvidia,tegra234-misc"; |