diff options
| author | haco <minhaco@msn.com> | 2018-12-28 10:09:40 +0000 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2019-01-11 14:16:56 +0800 |
| commit | af8cb01f1e435fc8ba9555afe0c2ce8a2b3cf9c5 (patch) | |
| tree | 87c0d1bcb4d0be40059d6b3fa94e29eab33411f8 /crypto | |
| parent | e12468241b19653d87534f3ff0778f1ad4668f5e (diff) | |
crypto: Kconfig - Fix typo in "pclmul"
Fix typo "plcmul" to "pclmul"
Signed-off-by: Huaxuan Mao <minhaco@msn.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'crypto')
| -rw-r--r-- | crypto/Kconfig | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/crypto/Kconfig b/crypto/Kconfig index 9511144ac7b5..86960aa53e0f 100644 --- a/crypto/Kconfig +++ b/crypto/Kconfig @@ -642,7 +642,7 @@ config CRYPTO_CRC32_PCLMUL From Intel Westmere and AMD Bulldozer processor with SSE4.2 and PCLMULQDQ supported, the processor will support CRC32 PCLMULQDQ implementation using hardware accelerated PCLMULQDQ - instruction. This option will create 'crc32-plcmul' module, + instruction. This option will create 'crc32-pclmul' module, which will enable any routine to use the CRC-32-IEEE 802.3 checksum and gain better performance as compared with the table implementation. @@ -671,7 +671,7 @@ config CRYPTO_CRCT10DIF_PCLMUL For x86_64 processors with SSE4.2 and PCLMULQDQ supported, CRC T10 DIF PCLMULQDQ computation can be hardware accelerated PCLMULQDQ instruction. This option will create - 'crct10dif-plcmul' module, which is faster when computing the + 'crct10dif-pclmul' module, which is faster when computing the crct10dif checksum as compared with the generic table implementation. config CRYPTO_CRCT10DIF_VPMSUM |