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authorMarian Mihailescu <mihailescu2m@gmail.com>2019-10-29 11:17:58 +1030
committerSylwester Nawrocki <s.nawrocki@samsung.com>2019-10-29 11:31:20 +0100
commitb92981de92cbbb93c80bbe800d6c3b32f0911641 (patch)
tree99adf12658ec9b573fe49a3785fafa1bddb377fe /drivers/clk/nxp
parente9323b664ce29547d996195e8a6129a351c39108 (diff)
clk: samsung: exynos5420: Add VPLL rate table
Add new table rate for VPLL for Exynos 542x SoC required to support Mali GPU clock frequencies. Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/clk/nxp')
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